similar to: Dial Rules in localprefixes.conf

Displaying 20 results from an estimated 300 matches similar to: "Dial Rules in localprefixes.conf"

2014 Jun 27
3
[LLVMdev] Contributing the Apple ARM64 compiler backend
AArch64AddressTypePromotion.cpp does a fair bit of work to help make these things work out well. It could probably be generalized for non-AArch64 targets as per the comment in the file header. > On Jun 26, 2014, at 10:42 AM, Sanjay Patel <spatel at rotateright.com> wrote: > > Cool HW trick. :) > Are those 'sxtw' ops free? > That’ll depend on the details of the
2014 Sep 02
3
[LLVMdev] LICM promoting memory to scalar
All, If we can speculatively execute a load instruction, why isn’t it safe to hoist it out by promoting it to a scalar in LICM pass? There is a comment in LICM pass that if a load/store is conditional then it is not safe because it would break the LLVM concurrency model (See commit 73bfa4a). It has an IR test for checking this in test/Transforms/LICM/scalar-promote-memmodel.ll However, I have
2014 Sep 02
2
[LLVMdev] LICM promoting memory to scalar
I think gcc is right. It inserted a branch for n == 0 (the cbz at the top), so that's not a problem. In all other regards, this is safe: if you examine the sequence of loads and stores, it eliminated all but the first load and all but the last store. How's that unsafe? If I had to guess, the bug here is that LLVM doesn't want to hoist the load over the condition (which it is right
2014 Sep 03
3
[LLVMdev] LICM promoting memory to scalar
Thanks for the background on the concurrent memory model. So, is it sufficient that the loop entry is guarded by condition (cbz at top) for preventing the race? The loop entry will be guarded by condition if loop has been rotated by loop rotate pass. Since LICM runs after loop rotate, we can use ScalarEvolution::isLoopEntryGuardedByCond to check if we can speculatively execute load without
2014 Jun 26
2
[LLVMdev] Contributing the Apple ARM64 compiler backend
Hi Sanjay, The behaviour I’m talking about I’ve actually pinned down to CodeGenPrepare not working too well with ISA’s that don’t have a good scaled load. I have a patch to fix it that is going through performance testing now. Your testcase seems specific to x86 – for aarch64 we get the rather spiffy: _Z3fooPii: // @_Z3fooPii // BB#0:
2005 Jun 19
2
outgoing call routing
I have a Asterisk @home ver 1.0 running with a TDMB11 card. Several sip extensions and a regular phone connected to the box. All routing works fine from the regular phone connected to the box, whether its going to FWD, broadvoice or the PSTN. The problem I am experiencing comes from making calls from the sip phones. They get routed correctly to the sip and iax trunks but when making calls
2017 Nov 14
6
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
To give an update here, we actually are not missing a mapping. The code complains because we are copying around a fp16 into a gpr32 and that shouldn’t be done with a copy (default mapping). I extended the repairing code to issue G_ANYEXT in those cases instead of asserting. However, now, I have to teach instruction select about those ANYEXT otherwise we’ll fallback in that case. But that’s a
2015 Feb 04
2
[LLVMdev] Question on Machine Combiner Pass
Ping From: Mandeep Singh Grang [mailto:mgrang at codeaurora.org] Sent: Tuesday, February 03, 2015 4:34 PM To: 'llvmdev at cs.uiuc.edu' Cc: 'ghoflehner at apple.com'; 'apazos at codeaurora.org'; mgrang at codeaurora.org Subject: Question on Machine Combiner Pass Hi, In the file lib/CodeGen/MachineCombiner.cpp I see that in the function
2015 Nov 23
1
[Aarch64 v2 05/18] Add Neon intrinsics for Silk noise shape quantization.
On Nov 23, 2015, at 12:04 PM, John Ridges <jridges at masque.com<mailto:jridges at masque.com>> wrote: Hi Jonathan. I really, really hate to bring this up this late in the game, but I just noticed that your NEON code doesn't use any of the "high" intrinsics for ARM64, e.g. instead of: int32x4_t coef1 = vmovl_s16(vget_high_s16(coef16)); you could use: int32x4_t coef1
2017 Nov 17
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
Hi Oliver, Thanks for trying this. Could you file a different PR for each of the problem you found and reference the umbrella PR: http://llvm.org/PR35347? <http://llvm.org/PR35347?> Thanks, -Quentin > On Nov 17, 2017, at 8:17 AM, Oliver Stannard <oliver.stannard at arm.com> wrote: > > Hi Quentin, > > One more reproducer, this time with small (<64bit) values
2005 Jun 03
1
Caller ID Routing using VoicePulseConnect
I have a question for those of you out there using VoicePulseConnect for incoming did I have in my Realtime extensions Database (the x's are replaced with my phone number) context = voicepulse-in-01 exten = xxxxxxxxxx/ Priority=1 app=NoOp appdata = Incoming call with no callerid on xxxxxxxxxx However it never triggers I also tried using one of my other providers (voipjet for outbound) and
2015 Nov 20
2
[Aarch64 00/11] Patches to enable Aarch64
> On Nov 19, 2015, at 5:47 PM, John Ridges <jridges at masque.com> wrote: > > Any speedup from the intrinsics may just be swamped by the rest of the encode/decode process. But I think you really want SIG2WORD16 to be (vqmovns_s32(PSHR32((x), SIG_SHIFT))) Yes, you?re right. I forgot to run the vectors under qemu with my previous version (oh, the embarrassment!) Fixed forthcoming
2017 Nov 27
2
[GlobalISel][AArch64] Toward flipping the switch for O0: Please give it a try!
Thanks all. Amara, could you take a look? > On Nov 20, 2017, at 3:06 AM, Oliver Stannard <oliver.stannard at arm.com> wrote: > > Hi Quentin, > > I’ve raised: > https://bugs.llvm.org/show_bug.cgi?id=35359 <https://bugs.llvm.org/show_bug.cgi?id=35359> > https://bugs.llvm.org/show_bug.cgi?id=35360 <https://bugs.llvm.org/show_bug.cgi?id=35360> >
2015 Aug 11
2
NSW and ExtLdPromotion()
Hi, All: I have a testcase which produced incorrect result, it's caused by the combination of nsw flag and ExtLdPromotion, I am leaning to say Clang set nsw flag incorrectly, but please let me know if I was wrong. Here is the reduced testcase: long long foo(int *a) { long long c; c = *a * 1405; return c; } Clang emitted the following IR (It is done by EmitMUL() in
2014 Jun 26
2
[LLVMdev] Contributing the Apple ARM64 compiler backend
HI James, Thanks for your reply and hints on what can be done for the Aarch64 backend optimization for llvm We have SPEC license and v8 hardware. So I will start looking into it warm regards Manjunath On Wed, Jun 25, 2014 at 8:42 PM, James Molloy <james.molloy at arm.com> wrote: > Hi Manjunath, > > At the time of writing that status we had only done our initial analysis. >
2009 Mar 24
1
Discriminant analysis - stepwise procedure
Dear R users, I have some environmental variables and I need to find the best combination of them in order to separate two main groups (coded 1 and 2). I have performed a discriminant analysis using the stepclass function as a method for selecting the most relevant environmental variables. The problem is that this function includes a parameter (start.vars) and my results change a lot when I
2008 Sep 13
1
What if some phone picks up
Godd evening! What happens if someone calls and asterisk doesn't "Answer()" itself, but another analog phone does? Can I somehow catch this situation in my dialplan. I have an ISDN line, but with it I got a box with an adapter for good old analog phones. This doesn't seems to be directly connected to the ISDN line asterisk sees. But somehow, it must know, that the call
2006 Nov 10
2
Outgoing problem on PRI
Dear All, I have an asterisk server version 1.2.12.1 along with trixbox and I am having this nasty problem, I have a TE200P and have an E1 pri attached to it and zttool says it's OK, I have configured the whole 31 channels into one group as follow: Zapata-auto.conf: callerid=asreceived signalling=pri_cpe switchtype=euroisdn context=from-zaptel group=0 channel=>1-15,17-31
2004 May 22
3
kerberos5 / gssapi support in mount.cifs?
Hi, allow me another question. Is it planned or already implemented to support gssapi with mount.cifs? Regards, Timo
2017 Feb 27
5
Test suite failures in R-devel_2017-02-25_r72256
Hi, I tried compiling the latest pre-release for R 3.3.3 for the NixOS Linux distribution [1], but the build fails during the "make check" phase because of the following 2 issues: 1) The "tools" test in "tests/Examples" requires network access, which it doesn't have in our build environment. Therefore, it fails as follows according to