similar to: Three way calling with X-Lite / MeetMe

Displaying 20 results from an estimated 600 matches similar to: "Three way calling with X-Lite / MeetMe"

2008 Jan 16
1
bad sound quality after Redirect
Hi! I'm building an application which allows to dial via the Asterisk Manager Interface using the originate command. There should be an optional conferencing feature. The manager commands are basically: --------------------------------- action: login username: sdjklgdsjg secret: xxx events: on action: originate callerid: 3847438609 priority: 1 exten: 4068439865 async: 1 context: out
2008 Dec 11
2
MeetMe echo problems with more than two participants
Hi Asterisk Users, we are using Asterisk 1.4.18.1 on debian 4.0 etch, pwlib 1.10 and openh323 1.18. We are using MeetMe for conference calls and with two participants there is no echo problems, but with more than two participants there is a lot of echo that sometimes disappear for a short time and all function well. Someone have some suggestions?? Do you ever used app_conference
2010 Dec 17
2
[LLVMdev] Branch delay slots broken.
Hi Richard, > You changes work for me also. I applied something similar to the Mips CG > and they worked there also. Thanks again. I can't reproduce the same problem here for Mips using clang, could you please attach the bitcode you used? Thanks -- Bruno Cardoso Lopes http://www.brunocardoso.cc
2009 Oct 12
3
[LLVMdev] Detecting reduction operations
On Oct 12, 2009, at 4:01 PM, Scott Ricketts wrote: > To be more specific, it would be helpful to have some utilities for > finding dependencies (true, output, and anti-). Where is a good place > to start for this kind of analysis? Hi Scott, Do you mean loop carried dependencies? There is some initial work on dependence analysis, but it is still pretty young. We also have support
2010 Dec 17
0
[LLVMdev] Branch delay slots broken.
On 12/17/2010 02:01 PM, Bruno Cardoso Lopes wrote: > Hi Richard, > >> You changes work for me also. I applied something similar to the Mips CG >> and they worked there also. Thanks again. > > I can't reproduce the same problem here for Mips using clang, could > you please attach the bitcode you used? > Thanks > Hi Bruno, This was the bitcode from a simple
2008 Oct 01
2
[LLVMdev] complex branching generation
LLVM seems to be generating way too complex of branching based on the short-circuit optimization. The code in question is as follows: define void @ test_fc_while_and(float %x, float %y, float addrspace(11)* %result) nounwind { entry: %tobool3 = fcmp une float %x, 0.000000e+000 ; <i1> [#uses=1] %tobool24 = fcmp une float %y, 0.000000e+000 ;
2009 Oct 13
0
[LLVMdev] Detecting reduction operations
> Hi Scott, > > Do you mean loop carried dependencies? There is some initial work on > dependence analysis, but it is still pretty young. We also have support for > dependence between memory operations that are not loop aware. > > -Chris I think the dependence analysis will have to be loop aware. For example: bb: %indvar = phi i64 [ 0, %bb.nph ], [ %indvar.next,
2015 Apr 28
2
[LLVMdev] alias set collapse and LICM
On Mon, Apr 27, 2015 at 4:21 PM, Daniel Berlin <dberlin at dberlin.org> wrote: > You can't win here (believe me, i've tried, and better people than me have > tried, for years :P). > No matter what you do, the partitioning will never be 100% precise. The > only way to solve that in general is to pairwise query over the > partitioning. > > Your basic problem is
2010 Jun 29
0
[LLVMdev] Confuse on getSCEVAtScope
On Jun 29, 2010, at 7:08 AM, ether zhhb wrote: > > why computeSCEVAtScope not try to get the operands in the current > scope like the function do with SCEVCommutativeExpr, like: > > if (const SCEVAddRecExpr *AddRec = dyn_cast<SCEVAddRecExpr>(V)) { > if (!L || !AddRec->getLoop()->contains(L)) { > ... > // Then, evaluate the AddRec. >
2010 Jun 29
2
[LLVMdev] Confuse on getSCEVAtScope
hi all, i have SCEVAddRec {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> where Loop0 and Loop1 are brothers (loops at the same level of the loopnest), and Loop0 have a computable backedge taken count. when i call getSCEVAtScope({{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1> , Loop1), it just give me a {{(32 + @edge.8265),+,32}<Loop0>,+,4}<Loop1>, instead of
2006 Jan 12
1
"infinite recursion" in do.call when lme4 loaded only
A larg program which worked with lme4/R about a year ago failed when I re-run it today. I reproduced the problem with the program below. -- When lme4 is not loaded, the program runs ok and fast enough -- When lme4 is loaded (but never used), the do.call fails with infinite recursion after 60 seconds. Memory used increases beyond bonds in task manager. -- I tested a few S3 based packages
2006 Jan 12
1
"infinite recursion" in do.call when lme4 loaded only
A larg program which worked with lme4/R about a year ago failed when I re-run it today. I reproduced the problem with the program below. -- When lme4 is not loaded, the program runs ok and fast enough -- When lme4 is loaded (but never used), the do.call fails with infinite recursion after 60 seconds. Memory used increases beyond bonds in task manager. -- I tested a few S3 based packages
2010 May 28
4
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
I have some LLVM IR after the optimization passes defined in createStandardModulePasses with the optimization level set to 3. It contains what appears to me to be an easily optimizable branch statement. In particular, note in the code below that at the end of the "loop" BasicBlock that there is a conditional branch where in the false case, it branches to the label
2010 Nov 06
2
[LLVMdev] Hoisting elements of array argument into registers
I am seeing the wf loop get optimized just fine with llvm 2.8 (and almost as good with head). I'm running on Mac OS X 10.6. I have an apple supplied llvm-gcc and a self compiled llvm 2.8. When I run $ llvm-gcc -emit-llvm -S M.c $ opt -O2 M.s | llvm-dis I see that: 1. Tail recursion has been eliminated from wf 2. The accesses to sp have been promoted to registers 3. The loop has
2010 May 28
0
[LLVMdev] Combining Branch Statements - Missing Optimization Pass?
The thread here should help. http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-May/031624.html On May 28, 2010, at 6:35 AMPDT, Curtis Faith wrote: > I have some LLVM IR after the optimization passes defined in createStandardModulePasses with the optimization level set to 3. It contains what appears to me to be an easily optimizable branch statement. > > In particular, note in the code
2010 Nov 23
1
[LLVMdev] Unrolling loops into constant-time expressions
Hello, I've come across another example: I'm compiling with clang -S -emit-llvm -std=gnu99 -O3 clang version 2.9 (trunk 118238) Target: x86_64-unknown-linux-gnu Thread model: posix I take the code: int loops(int x) { int ret = 0; for(int i = 0; i < x; i++) { for(int j = 0; j < x; j++) { ret += 1; } } return ret; } and the
2010 Sep 30
4
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
Bill Wendling wrote: > On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: > >> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >> >>> Our architecture has 1-bit boolean predicate registers. >>> >>> I've defined comparison >>> >>> def NErrb : InstTCE<(outs I1Regs:$op3), (ins I32Regs:$op1,I32Regs:$op2), "", [(set
2010 Oct 01
2
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
On 1 Oct 2010, at 13:35, Bill Wendling wrote: > On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > >> Bill Wendling wrote: >>> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >>> >>>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>>> >>>>> Our architecture has 1-bit boolean predicate registers. >>>>>
2010 Oct 01
0
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG? (Re: comparison pattern trouble - might be a bug in LLVM 2.8?)
On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > Bill Wendling wrote: >> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >> >>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>> >>>> Our architecture has 1-bit boolean predicate registers. >>>> >>>> I've defined comparison >>>> >>>> def
2010 Oct 04
2
[LLVMdev] Illegal optimization in LLVM 2.8 during SelectionDAG
Bill Wendling wrote: > On Sep 30, 2010, at 2:13 AM, Heikki Kultala wrote: > >> Bill Wendling wrote: >>> On Sep 29, 2010, at 12:36 AM, Heikki Kultala wrote: >>> >>>> On 29 Sep 2010, at 06:25, Heikki Kultala wrote: >>>> >>>>> Our architecture has 1-bit boolean predicate registers. >>>>> >>>>> I've