similar to: Initial bootloader requirements of extlinux

Hey guys, Pasi mentioned on Li''s (and Owen''s) patches which provide TRIM/UNMAP support to the Linux backend/frontend that: " Isn''t the generic name for this functionality "discard" in Linux? and "trim" being the ATA specific discard-implementation, and "scsi unmap" the SAS/SCSI specific discard-implementation? Just

Thanks Anton and Krzysztof! Here is the dump using the -debug flag. At this point I am not making much sense of this, would it be too much to ask if one of you could walk me through one of these lines? One thing that I didn't point out is that I never defined any separate floating point registers, not sure if this will pose any issue? Thanks again for your time! Jeff jeff at

Hi, I am having issues running a new backend that I created for a new architecture. I suspect these errors may have something to do with how I have the string setup in LLVMTargetMachine() below? Also - It would be great if someone could point me to a document that describes some of these error messages? For example what does t26 ..t4 mean? Thanks in advance for taking your valuable time to help

Hi all I'm guessing this is a little off topic but here goes... We use PXELINUX and kickstart to automate our RHEL deployments and updates. Recently we started using PXELINUX/memdisk and an MS-DOS image to update the workstation BIOS'es. After selecting <F12> (network boot) and picking the update BIOS option, the BIOS is flashed, BIOS configuration made standard and then the

Hi All, I have a question about splitting 'EXTRACT_VECTOR_ELT' with 'v2i1'. I have a llvm IR code snippet as following: llvm IR code snippet: for.body: ; preds = %entry, %for.cond %i.022 = phi i32 [ 0, %entry ], [ %inc, %for.cond ] %0 = icmp ne <2 x i32> %vecinit1, <i32 0, i32 -23> %1 = extractelement <2 x i1>

Hi all, Our target does not have native support for 64-bit integers, so we rely on library calls for certain operations (like sdiv). We recently ran into a problem where these operations that are expanded to library calls aren't maintaining the proper ordering in relation to other chains in the DAG. The following snippet of a DAG demonstrates the problem. t0: ch = EntryToken t2:

Setting the ISD::ROTL to Expand doesn't work? (via SetOperation) You could also do a Custom hook if that's what you're looking for. On Thu, Nov 3, 2016 at 5:12 PM, Phil Tomson <phil.a.tomson at gmail.com> wrote: > ... or perhaps to rephrase: > > In 3.9 it seems to be doing a smaller combine much sooner, whereas in 3.6 > it deferred that till later in the

Is there any way to get it to delay this optimization where it goes from this: Initial selection DAG: BB#0 'bclr64:entry' SelectionDAG has 14 nodes: t0: ch = EntryToken t2: i64,ch = CopyFromReg t0, Register:i64 %vreg0 t4: i64,ch = CopyFromReg t0, Register:i64 %vreg1 t6: i64 = sub t4, Constant:i64<1> t7: i64 = shl Constant:i64<1>, t6

We've recently moved our project from LLVM 3.6 to LLVM 3.9. I noticed one of our code generation tests is breaking in 3.9. The test is: ; RUN: llc < %s -march=xstg | FileCheck %s define i64 @bclr64(i64 %a, i64 %b) nounwind readnone { entry: ; CHECK: bclr r1, r0, r1, 64 %sub = sub i64 %b, 1 %shl = shl i64 1, %sub %xor = xor i64 %shl, -1 %and = and i64 %a, %xor ret i64

> extends the elements to 8bit and stores them on stack. Store is responsible for zero-extend. This is the policy... - Elena -----Original Message----- From: jingu at codeplay.com [mailto:jingu at codeplay.com] Sent: Friday, September 15, 2017 17:45 To: llvm-dev at lists.llvm.org; Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com Subject: Re: Question

On 15 dec. 2013, at 20:21, Ady <ady-sf at hotmail.com> wrote: Hi Ady, > Please forgive my ignorance. Could someone point to some "standard" > or some documentation where the supposedly correct / adequate value > (EE or ED or whichever) is specifically listed and/or explained? > > For example, where is this "ED" partition type ID listed where it >

One option may be to prevent the formation of ROTL, if possible, and then generating rol by hand. Marking it as "expand" would likely stop the DAG combiner from creating it. Then you could "preprocess" the selection DAG before the instruction selection and do the pattern matching yourself. -Krzysztof On 11/3/2016 4:24 PM, Phil Tomson via llvm-dev wrote: > I could try

Hi everyone, I am trying to accomplish a small task that is giving me quite a headache. I would like to automatically generate a series of matrices and give them successive names. Here is what I thought at first: t1<-matrix(0, nrow=250, ncol=1) for(i in 1:10){ t1[i]<-rnorm(250) } What I intended was that the loop would create 10 different matrices with a single column of 250

---------- Forwarded message ---------- From: Ikem Krueger <ikem.krueger at googlemail.com> Date: 2012/1/2 Subject: Re: How to install extlinux (syslinux) as a bootloader To: webster at shallowsky.com > Sadly, the Syslinux wiki had its database corrupted some time back, so it's not currently available. There is a "snapshot" from the site in the Internet archive[1]. [1]

Hi, On SystemZ there are a set of "access registers" that can be copied in and out of 32-bit GPRs with special instructions. These instructions can only perform the copy using low 32-bit parts of the 64-bit GPRs. As reported and discussed at https://bugs.llvm.org/show_bug.cgi?id=44254, this is currently broken due to the fact that the default register class for 32-bit integers is

Please open a bugzilla ticket and attach your testcase. It will allow us to debug and fix the problem. Thanks - Elena From: JinGu [mailto:jingu at codeplay.com] Sent: Saturday, September 16, 2017 00:38 To: Demikhovsky, Elena <elena.demikhovsky at intel.com>; daniel_l_sanders at apple.com <daniel_l_sanders at apple.com>; Jon Chesterfield <jonathanchesterfield at

> On 12/16/2013 12:28 AM, Ruben Kerkhof wrote: > > > > On 15 dec. 2013, at 20:21, Ady <ady-sf at hotmail.com> wrote: > > > > Hi Ady, > > > >> Please forgive my ignorance. Could someone point to some "standard" > >> or some documentation where the supposedly correct / adequate value > >> (EE or ED or whichever) is

Hi syslinux list, Some months ago, hpa was kind enough to help me troubleshoot booting Extlinux in a system with the following particulars: * Windows Vista x64 bootloader in the MBR and Vista installed in /dev/sda1 * Extlinux 3.72 installed in the first sector of /dev/sda2 and Foresight Linux installed in /dev/sda2 (at the time I tried, 3.72 was the default bootloader in Foresight) The problem

It would be nice to have something like stata's outreg that lets regression output go into a form like Specification (1) Specification (2) Var 1 coef(1,1) coef(1,2) se(1,1) se(1,2) Var 2 coef(2,1) coef(2,2) se(2,1) se(2,2) I don't think this can be done in xtable? Thomas Davidoff Assistant Professor Haas School of Business UC Berkeley Berkeley, CA 94618 Phone: (510)

Dear all, I am having a data for 2 different treatments with different time points. So, I used the following code to plot the boxplot and also to do anova. T11 <- c(280, 336, 249, 277, 429) T12 <- c(400, 397, 285, 407, 313) T13 <- c(725, 373, 364, 706, 249) T21 <- c(589, 257, 466, 248, 913) T22 <- c(519, 424, 512, 298, 907) T23 <- c(529, 479, 634, 354, 1015) obs <- c(T11,