similar to: Help

Displaying 20 results from an estimated 7000 matches similar to: "Help"

2015 Mar 24
2
[LLVMdev] [GSoC] Improvent of PRE in LLVM compiler
Greetings, (I am reposting this email of mine, as I was informed that emails from the domain 'iith.ac.in' are sometimes being marked as spam) I am Aradhya Biswas, final year student of Computer Science and Engineering at Indian Institute of technology Hyderabad (IITH), and as mentioned in my previous email on the LLVM dev mailing list, I am interested to work towards the improvement of
2005 Sep 20
4
Active DNS registration on join realm?
Dear Samba members, I am wondering if on joining a realm (with security=ADS), samba 3.x server gets automatically registered with MS Dynamic DNS server. My test with Samba 3.0.14a on linux did not reveal any such capability. But may be because I did not use the correct option? I would appreciate any help. Thanks in advance, -Arup Biswas
2012 Jan 23
0
Re: Grant-table error messages in a crash log
Hi Team, For a XenServer (5.6 sp2) crash I have got following in the crash logs. Can somebody tell me why I can see(grant_table.c:1408:d0 dest domain 40 dying) this and how I can resolve it, if it is an issue. (XEN) *** Serial input -> Xen (type ''CTRL-a'' three times to switch input to DOM0) (XEN) Freed 128kB init memory. (XEN) __csched_vcpu_acct_start: setting dom 0
2018 Mar 13
1
[SCEV] Inconsistent SCEV formation for zext
Hi Pankaj, On Tue, Mar 13, 2018 at 1:55 PM, Chawla, Pankaj <pankaj.chawla at intel.com> wrote: > Thanks for the reply! > Would it be possible for you to implement this? I don't have cycles for this right now, but if you file a bug I can give this a shot when I have time later. Even in the best case this will have to at least wait until end of April because I'm leaving for a
2019 Aug 26
2
missing simplification in ScalarEvolution?
Hi Sanjoy, Thanks for the reply! Your approach sounds good to me! I think 1) is legal as address wraparound in unsigned range doesn't make sense given a positive offset, but I am not sure. I think umax will not be added if we can prove the predicate as known. I am not sure whether umax will get simplified if we add nuw to the expressions. -Pankaj -----Original Message----- From: Sanjoy
2018 Mar 13
0
[SCEV] Inconsistent SCEV formation for zext
Hi Sanjoy, Thanks for the reply! Would it be possible for you to implement this? You know the codebase better than I do. Thanks, Pankaj -----Original Message----- From: Sanjoy Das [mailto:sanjoy at playingwithpointers.com] Sent: Tuesday, March 13, 2018 1:34 PM To: Chawla, Pankaj <pankaj.chawla at intel.com> Cc: Maxim Kazantsev <max.kazantsev at azul.com>; Serguei Katkov
2011 Jun 24
2
Nested VM
Hello, As part of my project for my MSc, I am looking for a solution to implement nested virtual machines. My current scenario is: - I have a server with AMD Phenom II X6 1100T and 8GB RAM - virtualization enabled at BIOS. - I have installed 64bit CentOS-5.6 with Xen enabled (let''s call it as base1). - On top of base1 I have also installed 64bit CentOS-5.6 (guest1) with Xen enabled and
2020 Mar 17
3
valid BasicAA behavior?
Hi Hal, In that case what is the best way to query whether there is a loop carried dependence between B[j] and A[j] at i-loop level? We were operating under the assumption of 'conservatively correct' behavior of alias analysis in the function scope? Thanks, Pankaj From: Finkel, Hal J. <hfinkel at anl.gov> Sent: Tuesday, March 17, 2020 11:50 AM To: Hiroshi Yamauchi <yamauchi at
2016 Oct 18
2
[SCEV] inconsistent operand ordering
Thanks for the helpful reply! I see that we are trying to keep ScalarEvolution stable around instruction ordering. My suggestion would be to not restrict the fix by only recursing on the first operand. By "dominator logic" I meant that if all other 'cheap' checks fail, we should decide by walking the dominator tree to see which instruction's basic block is encountered
2019 Aug 21
2
missing simplification in ScalarEvolution?
Thanks for the suggestion but datalayout info did not solve the problem! -Pankaj -----Original Message----- From: Philip Reames <listmail at philipreames.com> Sent: Tuesday, August 20, 2019 5:26 PM To: Chawla, Pankaj <pankaj.chawla at intel.com>; llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] missing simplification in ScalarEvolution? Try adding a datalayout with pointer size
2018 Mar 13
2
[SCEV] Inconsistent SCEV formation for zext
This sounds fine to me (and sorry for the delay!). -- Sanjoy On Mon, Mar 12, 2018 at 1:09 PM, Chawla, Pankaj <pankaj.chawla at intel.com> wrote: > Hi Sanjoy, > > So what is the verdict on this issue? > > Thanks, > Pankaj > > > -----Original Message----- > From: Chawla, Pankaj > Sent: Monday, February 26, 2018 11:12 AM > To: Sanjoy Das <sanjoy at
2011 Oct 05
0
[LLVMdev] collect end line number for scope
Pankaj, If you want to decorate MachineInstrs then for the end of scope you're not looking at "}" but instead you're looking at _last_ machine instruction in that scope. Now, if you want to find out start and end MachineInstrs for a lexical scope (and corresponding line numbers) then see CodeGen/LexicalScopes pass. It collects lexical scope information and maps MIs to respective
2011 Oct 04
0
[LLVMdev] collect end line number for scope
Hi, He is referring to current SVN head. Regards, Alex On Tue, Oct 4, 2011 at 12:08 PM, Pankaj Gode <godepankaj at yahoo.com> wrote: > What do you mean by "current top of tree"? > > Pankaj > From: Eric Christopher <echristo at apple.com> > To: Pankaj Gode <godepankaj at yahoo.com> > Cc: "llvmdev at cs.uiuc.edu" <llvmdev at
2011 Oct 04
2
[LLVMdev] collect end line number for scope
What do you mean by "current top of tree"?   Pankaj ________________________________ From: Eric Christopher <echristo at apple.com> To: Pankaj Gode <godepankaj at yahoo.com> Cc: "llvmdev at cs.uiuc.edu" <llvmdev at cs.uiuc.edu> Sent: Monday, October 3, 2011 10:32 PM Subject: Re: [LLVMdev] collect end line number for scope On Oct 3, 2011, at 4:36 AM,
2011 Jul 06
5
Error of building dom0 kernel
Hi all, I follow instructions(http://wiki.xensource.com/xenwiki/XenParavirtOps) to build XEN and dom0 kernel. Building XEN has no problem, but there is an error which I cannot solve to build dom0 kernel. The brief instructions for building dom0 are get linux-2.6-xen code from git and make ARCH=x86_64 menuconfig, finally generate kernel.deb. (I did every step exactly as the web page says)
2017 Apr 17
2
Question on induction variable simplification pass
Hi Pankaj, On April 14, 2017 at 4:55:16 PM, Chawla, Pankaj (pankaj.chawla at intel.com) wrote: > I have attached the IR I got by compiling with -O2. This is just before we widen the IV. Thanks! > To get the backedge taken count info I ran indvars on it and then replaced zext with sext. > > I think regardless of where we decide to add this transformation in the pipeline, it should
2011 Oct 05
2
[LLVMdev] collect end line number for scope
Hi,   The link and the information shared was helpful.   I will make my problem definition more clear. While I am "asm printing" target code, I also want to emit scope related information. Scope related information includes, - for each scope, start line, end line, start column, end column and - scope heirarchy. As scope is delimited by "{" and "}" (for an input
2013 Apr 29
1
[LLVMdev] LowerDbgDeclare results in redeclaration of local variable
Hi Eric,   Thanks for patch information. I have checked the patch with my code and I see that it works. But when I extract the variable and check the metadata information to retrieve the scope information, I do not get exact scope, after optimization. As you said that this is a work in progress, so can we expect full version on this in llvm3.3 release ?   Regards, Pankaj  
2017 Apr 14
3
Question on induction variable simplification pass
Hi Sanjoy, I have attached the IR I got by compiling with -O2. This is just before we widen the IV. To get the backedge taken count info I ran indvars on it and then replaced zext with sext. I think regardless of where we decide to add this transformation in the pipeline, it should try to preserve as much information as it can. This means that we should generate sext for signed IVs and
2020 Mar 17
2
valid BasicAA behavior?
My understanding is that alias analysis returns results in the function scope, not in loop scope. Since both the phis access both global arrays, that should results in BasicAA conservatively returning MayAlias. I debugged this a little bit and narrowed it down to the section of the code in BasicAAResult::aliasPHI() which has this comment- // Analyse the PHIs' inputs under the assumption