similar to: Numeric vector converted mysteriously to characters in data frame?

Dear all, I'm trying to replicate the panel function behaviour that Deepayan and others discuss here: https://stat.ethz.ch/pipermail/r-help/2007-April/130779.html and Oscar Lamigueiro refers to here and provides sample code for: http://www.r-bloggers.com/confidence-bands-with-lattice-and-r/ where a polygon is generated around lines on panels to display the confidence interval bounds for

>> Repetitive code with lots of bitwise operations is compiled by LLVM into >> much larger code than the other compilers: >> >> http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/ED/ED37DAF5.shtml >> http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/1F/1F4003C7.shtml >> >> Note that this is straight-line code, so LLVM's output will

Does anyone know some simple c/c++ code or .ll code which will cause this ctlz pattern to be emitted? Tia. Reed

Hello. Could you please tell me why am I not able to recognize (with LLVM built from the SVN code in Apr 25, 2018) the LLVM IR intrinsic ctpop (described at https://llvm.org/docs/LangRef.html#llvm-ctpop-intrinsic) in the following program: int PopCnt_Simple(int x) { int numBits = 0; int i; //for (i = 0; i < 32; i++) { for (i = 0; x !=

Hello, is it correct, that the "llvm.ctpop" Hamming weight intrinsic is currently (LLVM 2.2) implemented in Line 254 in lib/CodeGen/IntrinsicLowering.cpp /// LowerCTPOP - Emit the code to lower ctpop of V before the specified /// instruction IP. static Value *LowerCTPOP(Value *V, Instruction *IP) { assert(V->getType()->isInteger() && "Can't ctpop a

On Tue, Jan 26, 2010 at 5:55 PM, John Regehr <regehr at cs.utah.edu> wrote: >>> Repetitive code with lots of bitwise operations is compiled by LLVM into >>> much larger code than the other compilers: >>> >>> >>> http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/ED/ED37DAF5.shtml >>> >>>

> Umm, can you find one that isn't a popcount implementation? Ok. MMX psadbw instruction: http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/CE/CE3DA132.shtml Position of first set bit: http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/1F/1F4003C7.shtml Log2 floor: http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/83/837A80E9.shtml Pixel format

Are you looking for something other than calling __builtin_clz from c++ or calling @llvm.ctlz.* instrinsic from IR? I don't think we have anything that will auto converting a loop to ctlz or anything like that. We only seem to have a detection for popcount loops. On Thu, Aug 15, 2013 at 9:01 PM, reed kotler <rkotler at mips.com> wrote: > Does anyone know some simple c/c++ code or

Chris Lattner wrote: > On Mon, 30 Jul 2007, Sarah Thompson wrote: > >> ... can *any* instruction(s) other than load and store cause memory >> reads or writes? >> > > Functions calls can (transitively), This isn't a problem because I'll be picking up those reads and writes as the function executes anyway. > intrinsics can, Would it be feasible to

After some attempt to implement reduce-add in LLVM, I found out a easier way to detect reduce-add without introducing new IR operations. The basic idea is annotating phi node instead of add (so that it is easier to handle other reduction operations). In PHINode class, we can add a flag indicating if the phi node is a reduction one (the flag can be set in loop vectorizer for vectorized phi nodes).

At the LLVM Developers' Meeting in November, I promised to work on isolating a subset of the current test suite that is useful for benchmarking. Having looked at this in more detail, most of the applications and benchmarks in the test suite are useful for benchmarking, and so I think that a better way of phrasing it is that we should construct a list of programs in the test suite that are not

I tried to post this a few times last week and it seems to have got stuck somehow so I'm trying from a different email in the hope that works. If somehow this has appeared on the list 20 tiems and I never saw any of them I apologize ;-) I'm basically an R-newbie. But I am VERY computer literate. But this has me stumped... All the examples for using the rmeta package to create a

On Wed, Nov 25, 2015 at 2:32 PM, Hal Finkel <hfinkel at anl.gov> wrote: > Hi Cong, > > After reading the original RFC and this update, I'm still not entirely sure I understand the semantics of the flag you're proposing to add. Does it having something to do with the ordering of the reduction operations? The flag is only useful for vectorized reduction for now. I'll give

----- Original Message ----- > From: "Xinliang David Li" <davidxl at google.com> > To: "Cong Hou" <congh at google.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" <llvm-dev at lists.llvm.org> > Sent: Wednesday, November 25, 2015 5:17:58 PM > Subject: Re: [llvm-dev] [RFC] Introducing a vector reduction add

I recently subscribed to the LLVM and Clang developer mailing lists, and earlier today read a message requesting advice on "Contributing to LLVM Projects". I'm hoping to eventually get involved as well, but with my situation being very different to that described in the referenced thread I got the idea of solliciting advice seperately. If this is not the right place to ask, though,

Hi, I'm trying to make a chromosomal map in R by using the locus. I have a list of genes and their locus, and I want to visualise that so you can see if there are multiple genes on a specific place on a chromosome. A example of what I more or less want is below: http://www.nabble.com/file/p21474206/untitled.JPG untitled.JPG The genes and locus are here:

Hi, I'm stuck doing an install with Polycoms at a small office with no RJ-45. They went wireless 100%, poor them. I insist on using Polycom unless it's impossible because that's what I am standardized on for many reasons. What's the best way/device to turn a wired Polycom 501 (or any Polycom for that matter) into a WiFi phone? Mike -------------- next part --------------

On Tue, Jan 26, 2010 at 7:42 PM, John Regehr <regehr at cs.utah.edu> wrote: >> Umm, can you find one that isn't a popcount implementation? > > Ok. > > MMX psadbw instruction: > > http://embed.cs.utah.edu/embarrassing/jan_10/harvest/source/CE/CE3DA132.shtml > > Position of first set bit: > >

Are these 225 compile time regressions real? It sure looks bad! Ciao, Duncan. On 01/12/11 09:39, llvm-testresults at cs.uiuc.edu wrote: > > bwilson__llvm-gcc_PROD__i386 nightly tester results > > URL http://llvm.org/perf/db_default/simple/nts/380/ > Nickname bwilson__llvm-gcc_PROD__i386:4 > Name curlew.apple.com > > Run ID Order Start Time End Time > Current 380

On 17 June 2014 06:41, Eli Bendersky <eliben at google.com> wrote: > On Tue, Jun 17, 2014 at 1:38 AM, Nick Lewycky <nicholas at mxc.ca> wrote: > >> Chandler Carruth wrote: >> >>> This seems fine to me, but I'd like to make sure it looks OK to Nick as >>> well. >>> >> >> I strongly prefer baking in knowledge about the