Displaying 20 results from an estimated 10000 matches similar to: "nested factors different with/out brackets - is this a design feature?"
2011 Sep 28
1
Wilcox test and data collection
Dear Contributors
I have a problem with the collection of data from the results of a test.
I need to perform a comparative test over groups of data , recall the value
of the pvalue and create a table.
My problem is in the way to replicate the analysis over and over again over
subsets of data according to a condition.
I have this database, called y:
gg t1 t2 d
40 1 1
2007 Nov 14
1
Name collisions
I am receiving a list of name collisions when I launch R as seen below.
I'm new to R and any suggestion or help with how I can go about getting
rid of these collisions would be greatly appreciated.
% R
R version 2.5.1 (2007-06-27)
Copyright (C) 2007 The R Foundation for Statistical Computing
ISBN 3-900051-07-0
R is free software and comes with ABSOLUTELY NO WARRANTY.
You are welcome to
2011 Apr 27
0
[LLVMdev] Register pairing in PBQP
Hi Jakob,
The PBQP allocator should have no problem representing this. Between each
pair of address/modification registers that are used together in a
post-modification instruction you'll need to add the following cost matrix:
sp r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
sp 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
m0 0 0 0 0 0 i
2013 Oct 12
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi Jan,
For Cortex-M0, you should probably use the armv6m string in the target
triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb
won't be necessary.
Amara
On 11 October 2013 19:23, Jan Hoogerbrugge <
jan.hoogerbrugge at biface-tools.com> wrote:
> Hi,
>
> I am trying to cross compile code for ARM Cortex m0, m3, and m4.
>
> For m0, I use:
>
>
2013 Oct 11
3
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Hi,
I am trying to cross compile code for ARM Cortex m0, m3, and m4.
For m0, I use:
-target armv6--eabi -mcpu=cortex-m0
That seems to work. For m3 and m4, I use the following which does not work
(fatal error: error in backend: CPU: 'cortex-m3' does not support ARM mode):
-target armv7m--eabi -mcpu=cortex-m3
and
-target armv7em--eabi -mcpu=cortex-m4
Who can help me with the
2011 Sep 28
0
Problems using the 'HPloglik' function in the SDE package
Hello all,
I am trying to produce the closed-form Ait-Sahalia approximation to the
log-likelihood function of a diffusion process but the function arguments I
am passing to the function result in NaN being returned. I've checked the
'Transform','S' and 'M' functions and the problem doesn't seem to be with
these. Does anyone have any ideas why this isn't working?
2009 Mar 16
0
the effect of blocking on the size of confidence intervals - analysis using aov
Hi, I am a method developer in drug discovery.
I have developed a similarity searching method for small (drug-like)
molecules.
I want to compare the performance of my method to the performance of
other methods.
Similarity searching methods are commonly assessed by their ability to
(re)discover a
set of molecules that is avtive versus a given target, given one
randomly selected query
molecule.
2013 Oct 17
1
pamer.fnc y la nueva versión de R
Hola buenas noches,
tengo un problema bastante gordo. ¿A alguno le ha dejado de funcionar las
funciones pamer.fnc y mcp.fnc con la nueva versión de R? La semana pasada
formatee el ordenador y ahora scripts antiguos no funcionan. La cuestión es
que me precupa que no funcione el ejemplo de tutorial del autor.
Os dejo un script que debería de funcionar y no lo hace
2014 Dec 16
1
[LLVMdev] Newbee question: LLVM backend regression tests for thumb1 targets on simulator possible?
> > $ qemu-arm -cpu ?
> > Available CPUs:
> > arm926 arm946 arm1026 arm1136 arm1136-r2 arm1176 arm11mpcore
> > cortex-m3
> > cortex-a8
> > cortex-a8-r2 cortex-a9 cortex-a15 ti925t pxa250 sa1100 sa1110
> pxa255 pxa260
> > pxa261 pxa262 pxa270 pxa270-a0 pxa270-a1 pxa270-b0 pxa270-b1 xa270-
> c0
> > pxa270-c5 any
> >
>
2011 Jun 20
0
R crashes with 'nlme' and corStruct
Hello,
I would like to fit correlation structures with nlme, but R crashes.
My data is similar to the "growth of orange trees" example from Pinheiro and
Bates (2000),
but data are not equally spaced in time, as the last observation is taken
after 6 days ( and not 2 as the others).
This is the code I'm using:
library(nlme)
2016 Sep 07
0
Fwd: Re: RSiteSearch, sos, rdocumentation.org, ...?
Spencer,
Thanks for the quick reply.
I am open to someone who knows Perl getting an account on my site and
trying to get it working. It will probably involve fixing more than
one thing, as mknmz depends on some perl modules that also generate
errors.
My main contribution is figuring out how to extract the html help
files and vignettes only, with some help from R developers and Fedora
2013 Oct 12
2
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com> wrote:
> Hi Jan,
>
> For Cortex-M0, you should probably use the armv6m string in the target
> triple. For M3 and M4 you need to use the thumbv7m arch string, -mthumb
> won't be necessary.
>
Yes, but I agree with Jim that a bug must be filled.
Jan, would you mind filling a bug?
2013 Oct 14
0
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
I've got a trivial fix for this problem, and another one which manifests
when thumb is given without an explicit CPU. I'll start pushing it through
our submissions process.
On Saturday, 12 October 2013, Renato Golin wrote:
> On 12 October 2013 23:00, Amara Emerson <amara.emerson at gmail.com<javascript:_e({}, 'cvml', 'amara.emerson at gmail.com');>
> >
2013 Oct 14
1
[LLVMdev] Generate code for ARM Cortex m0, m3, and m4.
Thanks Bernie,
Feel free to assign yourself to the bug report, just so we know someone is
working on it.
cheers,
-renato
On 14 October 2013 17:38, Bernard Ogden <bogden.dev at gmail.com> wrote:
> I've got a trivial fix for this problem, and another one which manifests
> when thumb is given without an explicit CPU. I'll start pushing it through
> our submissions process.
2020 Jan 26
2
[RFC] Replacing inalloca with llvm.call.setup and preallocated
Hello all,
A few years ago, I added the inalloca feature to LLVM IR so that Clang
could be C++ ABI compatible with MSVC on 32-bit x86. The feature works, but
there is room for improvement. I recently took the time to write up a
design using token values that will hopefully be better named and easier to
work with and around.
For the technical details of the proposal, I've written up the RFC
2016 Sep 08
0
Fwd: Re: RSiteSearch, sos, rdocumentation.org, ...?
OK. It is sort of fixed and sort of works.
We'll keep it for now, but this is not going to work forever. When
namazu fails completely I will not have the time to install a new
search engine.
One option is to use google. For a site like this, I think they will
want some money, but I'm not sure, and I do not have the time to deal
with it.
We have over 10,000 packages now. I wonder if
2009 Oct 22
2
[LLVMdev] arm cortex-m3
Now that there is good thumb2 support in the ARM backend, would someone
please add "cortex-m3" to the "-march" list for the ARM backend. This
should produce pure thumb2 only code. At some point, when the subsets
are public, "cortex-m1" and "cortex-m0" should also be added.
thanks,
bagel
2009 Nov 24
0
[LLVMdev] arm cortex-m3
Looks OK to me, but I don't have any Cortex-M3 docs to confirm the
choice of v7-A without NEON.
deep
On Sun, Nov 22, 2009 at 9:47 PM, Bagel <bagel99 at gmail.com> wrote:
> Here is a one-line patch to support the cortex-m3.
> For those who plan the features for ARM, the new cortex-m0 implements only a
> subset of the Thumb2 instructions. I still have yet to see a document that
2016 Sep 08
0
Fwd: Re: RSiteSearch, sos, rdocumentation.org, ...?
On 9/8/2016 3:30 AM, Joris Meys wrote:
>
> Hi Jonathan,
>
> I have neither the resources nor the skills to take over, but whatever
> happens I want to thank you for all the work. Too often people forget
> that all these nice tools keep working due to the devotion of people
> like you.
>
> So thank you!
>
I concur. People all over the world live better
2020 Nov 18
0
Work on DAG Isel for TableGen and compiler
Yes, the CodeGenDAGPatterns is exactly right. Try applying the patch below
and rebuilding and you'll see what I mean about the error messages ;) That
being said, I'm sympathetic to Matt's point about shifting effort to
GlobalISel. Maybe it has similar problems you could work on? A nicer
development experience would certainly be a good carrot to get me excited
to switch over sooner.