Displaying 20 results from an estimated 10000 matches similar to: "regex expression to select row or column"
2017 Feb 07
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
This is a great idea. But the order (psEncC->shapingLPCOrder) can be
configured to 12, 14, 16, 20 and 24 according to complexity parameter.
It's hard to get a universal function to handle all these orders
efficiently. Any suggestions?
Thanks,
Linfeng
On Mon, Feb 6, 2017 at 12:40 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote:
> Hi Linfeng,
>
> On 06/02/17 02:51 PM,
2017 Feb 06
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Jean-Marc,
Thanks a lot for reviewing this huge assembly function!
silk_warped_autocorrelation_FIX_c()'s kernel part is
for( n = 0; n < length; n++ ) {
tmp1_QS = silk_LSHIFT32( (opus_int32)input[ n ], QS );
/* Loop over allpass sections */
for( i = 0; i < order; i++ ) {
/* Output of allpass section */
tmp2_QS = silk_SMLAWB(
2017 Feb 07
3
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Jean-Marc,
Thanks for your suggestions. Will get back to you once we have some updates.
Linfeng
On Mon, Feb 6, 2017 at 5:47 PM, Jean-Marc Valin <jmvalin at jmvalin.ca> wrote:
> Hi Linfeng,
>
> On 06/02/17 07:18 PM, Linfeng Zhang wrote:
> > This is a great idea. But the order (psEncC->shapingLPCOrder) can be
> > configured to 12, 14, 16, 20 and 24 according to
2017 Apr 05
2
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
I attached a new patch with small cleanup (disassembly is identical as the
last patch). We have done the same internal testing as usual.
Also, attached 2 failed temporary versions which try to reduce code size
(just for code review reference purpose).
The new patch of silk_warped_autocorrelation_FIX_neon() has a code size of
3,228 bytes (with gcc).
smaller_slower.c has a code size of 2,304
2017 Apr 05
4
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Thank Jean-Marc!
The speedup percentages are all relative to the entire encoder.
Comparing to master, this optimization patch speeds up fixed-point SILK
encoder on NEON as following: Complexity 5: 6.1% Complexity 6: 5.8%
Complexity 8: 5.5% Complexity 10: 4.0%
when testing on an Acer Chromebook, ARMv7 Processor rev 3 (v7l), CPU max
MHz: 2116.5
Thanks,
Linfeng
On Wed, Apr 5, 2017 at 11:02 AM,
2006 Mar 15
2
Regarding aov Error()
The following dummy data frame has factor Q (with 2 levels) nesting
factor P (with levels p1 and p2 nested under q1, and p3 and p4 nested
under q2), but both crossing the random variate s, which has 8
levels. The dependent measure is dv.
> # The data frame:
> testnest
dv s P Q
1 1 s1 p1 q1
2 2 s2 p1 q1
3 1 s3 p1 q1
4 2 s4 p1 q1
5 1 s5 p1 q1
6 3 s6 p1 q1
7 3 s7
2005 May 29
2
"text"-function: adding text in an x,y-plot
Hello R-friends,
i have a question to the "text"-function.
a little test-dataset for better understanding:
-the dataset was imported with read.table(....,header=TRUE)
s1-s10 are the samplenames
var1 var2 var3
s1 1 1 2
s2 2 3 1
s3 2 2 3
s4 5 4 3
s5 4 2 3
s6 6 3 2
s7 8 5 4
s8 7 2 1
s9 9 3 2
2010 Mar 14
2
code rows depending on the value of other rows in multilevel dataframe
I have a multilevel dataframe (df):
ID Date Segment Slice Tract Lesion
1 CSPP005 12/4/2007 1 1 LCST 0
2 CSPP005 12/4/2007 1 1 LPC 2
3 CSPP005 12/4/2007 1 1 RPC 3
4 CSPP005 12/4/2007 1 1 RCST 1
5 CSPP005 12/4/2007 1 1 LGM 0
6 CSPP005 12/4/2007 1 1
2019 Aug 27
2
TargetRegisterInfo::getCommonSubClass bug, perhaps.
Hi,
ABCRegister.td :
def SGPR32 : RegisterClass<"ABC", [i32], 16, (add
S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11,
S12, S13, S14, S15
)>;
def SFGPR32 : RegisterClass<"ABC", [f32], 16, (add
S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11,
S12, S13, S14, S15
)>;
===== Instruction selection ends:
...
t8: i32 = ADDrr t37, t32
2017 Feb 06
0
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Linfeng,
On 06/02/17 02:51 PM, Linfeng Zhang wrote:
> However, the critical thing is that all the states in each stage when
> processing input[i] are reused by the next input[i+1]. That is
> input[i+1] must wait input[i] for 1 stage, and input[i+2] must wait
> input[i+1] for 1 stage, etc.
That is indeed the tricky part... and the one I think you could do
slightly differently. If
2017 Feb 07
0
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Linfeng,
On 06/02/17 07:18 PM, Linfeng Zhang wrote:
> This is a great idea. But the order (psEncC->shapingLPCOrder) can be
> configured to 12, 14, 16, 20 and 24 according to complexity parameter.
>
> It's hard to get a universal function to handle all these orders
> efficiently. Any suggestions?
I can think of two ways of handling larger orders. The obvious one is
2017 Apr 03
0
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Jean-Marc,
Attached is the silk_warped_autocorrelation_FIX_neon() which implements
your idea.
Speed improvement vs the previous optimization:
Complexity 0-4: Doesn't call this function. Complexity 5: 2.1% (order = 16)
Complexity 6: 1.0% (order = 20) Complexity 8: 0.1% (order = 24) Complexity
10: 0.1% (order = 24)
Code size of silk_warped_autocorrelation_FIX_neon() changes from 2,644
2017 Apr 05
0
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Linfeng,
Thanks for the updated patch. I'll have a look and get back to you. When
you report speedup percentages, is that relative to the entire encoder
or relative to just that function in C? Also, what's the speedup
compared to master?
Cheers,
Jean-Marc
On 05/04/17 12:14 PM, Linfeng Zhang wrote:
> I attached a new patch with small cleanup (disassembly is identical as
> the
2017 Oct 11
1
[PATCH v1 01/27] x86/crypto: Adapt assembly for PIE support
Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible.
Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.
Signed-off-by: Thomas Garnier <thgarnie at google.com>
---
arch/x86/crypto/aes-x86_64-asm_64.S | 45 ++++++++-----
arch/x86/crypto/aesni-intel_asm.S
2017 Apr 06
0
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi Linfeng,
I had a closer look at your patch and the code looks good -- and
slightly simpler than I had anticipated, so that's good.
I did some profiling on a Cortex A57 and I've been seeing slightly less
improvement than you're reporting, more like 3.5% at complexity 8. It
appears that the warped autocorrelation function itself is only faster
by a factor of about 1.35. That's a
2017 Jan 31
6
[PATCH] Optimize silk_warped_autocorrelation_FIX() for ARM NEON
Hi,
Attached is a patch with arm neon optimizations for
silk_warped_autocorrelation_FIX(). Please review.
Thanks,
Felicia
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2018 Sep 28
3
error: expected memory with 32-bit signed offset
Hi,
I want to encode Loongson ISA initially
https://gist.github.com/xiangzhai/8ae6966e2f02a94e180dd16ff1cd60ac
gslbx $2,0($3,$4)
It is equivalent to:
dadd $1, $3, $4
lb $2,0($1)
I just use mem_simmptr as the default value of DAGOperand MO ,
because MipsMemAsmOperand use parseMemOperand to parse general
MemOffset and only *one* AnyRegister , for example:
0($1)
But
2010 Jan 11
1
HoltWinters Forecasting
Hi R-users,
I have a question relating to the HoltWinters() function. I am trying to
forecast a series using the Holt Winters methodology but I am getting some
unusual results. I had previously been using R for Windows version 2.7.2 and
have just started using R 2.9.1. While using version 2.7.2 I was getting
reasonable results however upon changing versions I found I started to see
unusual
2012 Aug 10
4
subsetting levels of a vector
Hi,
I need to subset different levels of vector in a dataset to create a new dataframe that contains only these. These observations are not numerical, so I can't use the subset() function (at least this is the response I get from R).
Suppose the dataframe looks like this:
ParticipID ERP Electrode
1 s1 0.0370 FP1
2 s2 35.0654 FP2
3 s3
2014 Mar 11
4
[PATCH] add mips64 support
From: Dejan Latinovic <Dejan.Latinovic at imgtec.com>
---
usr/include/arch/mips64/klibc/archconfig.h | 3 +
usr/include/arch/mips64/klibc/archsetjmp.h | 39 ++++++
usr/include/arch/mips64/machine/asm.h | 76 ++++++++++
usr/include/fcntl.h | 2 +-
usr/include/sys/md.h | 1 +
usr/include/sys/resource.h | 4 +-