Displaying 20 results from an estimated 4000 matches similar to: "Frequency Counts per Time Period"
2010 Sep 17
4
count frequency
Hello everyone,
please consider the following lines of a matrix
[574,] 59 32
[575,] 59 32
[576,] 59 32
[577,] 59 32
[578,] 59 32
[579,] 59 32
[580,] 59 32
[581,] 60 32
[582,] 60 33
[583,] 60 33
[584,] 60 33
[585,] 60 33
[586,] 60 33
[587,] 60 33
[588,] 60 33
[589,] 60 33
[590,] 60 33
[591,] 61 33
[592,] 61 33
[593,] 61
2012 Jun 02
1
Determining frequency and period of a wave
Hello! I'm collecting data on a refrigerator that I'm using to cure
meat. Specifically I am collection humidity and temperature readings.
The temperature readings look sinusoidal (due to the refrigerator
turning on and off).
I'd like to calculate the frequency and period of the wave so that I can
determine if modifications I make to the equipment are increasing or
decreasing
2017 Sep 14
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
Thank you for your thoughts, Hal. More information below...
On Sep 13, 2017, at 5:43 PM, Hal Finkel <hfinkel at anl.gov<mailto:hfinkel at anl.gov>> wrote:
On 09/13/2017 01:01 PM, Daniel Neilson via llvm-dev wrote:
… snip
For example, the following IR will produce different sets of IV users if either:
i) The order of the PHI nodes in the %loop block are reordered; or
ii) The
2017 Sep 13
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
Hi all,
I’ve most recently been grappling with a difficult to reproduce bug. I’ve traced the source of the difficulty in reproduction to the IVUsers analysis pass that is used by Loop Strength Reduction. Specifically, the IVUsers pass’s output is very sensitive to both the use list ordering of the instructions that it is looking at and the ordering of the Phi nodes in the header block of the loop
2017 Jul 04
4
trunc nsw/nuw?
Hi,
> Hi Alexandre,
>
> LLVM currently doesn't have trunc nsw/nuw, no.
> Which frontend would emit such instructions? Any application in mind?
> Just asking because if no frontend could emit those, then the motivation to
> add nsw/nuw support to trunc would be very low I guess.
I think the clang frontend could use that to allow better static analysis of integer overflows
on
2017 Sep 15
2
IVUsers pass is fragile. Is this okay? How can it be resolved?
On Sep 14, 2017, at 9:30 PM, Hal Finkel <hfinkel at anl.gov<mailto:hfinkel at anl.gov>> wrote:
On 09/14/2017 10:43 AM, Daniel Neilson wrote:
Thank you for your thoughts, Hal. More information below...
On Sep 13, 2017, at 5:43 PM, Hal Finkel <hfinkel at anl.gov<mailto:hfinkel at anl.gov>> wrote:
On 09/13/2017 01:01 PM, Daniel Neilson via llvm-dev wrote:
… snip
For
2017 Jul 03
2
trunc nsw/nuw?
Hello,
>From [1], trunc does not seems to have a nsw/nuw attribute.
Is it possible to have that? Or do we have that and it is not up-to-date?
The definition would be:
If the nuw keyword is present, the result value of the trunc is a poison
value if the truncated high order bits are non-zero. If the nsw keyword is
present, the result value of the trunc is a poison value if the truncated
high
2012 Aug 06
4
[LLVMdev] Casting from float to unsigned char - incorrect output?
I am compiling the following code for the MIPS architecture:
unsigned char trunc(float f) {
return (unsigned char) f;
}
and it produces the following assembly (directives removed for convenience:
trunc:
trunc.w.s $f0, $f12
mfc1 $2, $f0
jr $ra
nop
However, this does not seem to produce the correct output for negative
numbers. When I run the following code, I get
2017 Sep 16
0
IVUsers pass is fragile. Is this okay? How can it be resolved?
On 09/14/2017 10:31 PM, Daniel Neilson wrote:
>
>
>> On Sep 14, 2017, at 9:30 PM, Hal Finkel <hfinkel at anl.gov
>> <mailto:hfinkel at anl.gov>> wrote:
>>
>>
>> On 09/14/2017 10:43 AM, Daniel Neilson wrote:
>>> Thank you for your thoughts, Hal. More information below...
>>>
>>>> On Sep 13, 2017, at 5:43 PM, Hal Finkel
2017 Jul 05
3
trunc nsw/nuw?
On 07/05/2017 03:10 PM, Alexandre Isoard wrote:
> Ah, ok. I read it wrong. In *neither* case it is UB.
>
> Hum, can an implementation define it as UB? :-)
Nope :-)
The only case I've thought of where we could add these for C++ would be
on conversions to (most) enums (because they used signed underlying
types and the out-of-bounds mapping won't generally be one of the
allowed
2017 Jul 05
2
trunc nsw/nuw?
On Wed, Jul 5, 2017 at 3:59 PM, Hal Finkel via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
>
> On 07/04/2017 01:41 AM, Dr.-Ing. Christoph Cullmann via llvm-dev wrote:
>
>> Hi,
>>
>> Hi Alexandre,
>>>
>>> LLVM currently doesn't have trunc nsw/nuw, no.
>>> Which frontend would emit such instructions? Any application in mind?
2000 Mar 07
1
A simple question??
Dear all,
I'm currently use R v0.99 on Windows 98 Second Edition. I have a question on some simple calculations. I wonder that I've done something wrong with the calculation.
Here is the imput commands:
> a <- 25.01
> b <- 56.08
> a.trunc <- trunc(a)
> b.trunc <- trunc(b)
> a.tail <- a - a.trunc
> b.tail <- b - b.trunc
> a.trunc
[1] 25
>
2017 Jan 21
2
IR canonicalization: shufflevector or vector trunc?
On Thu, Jan 19, 2017 at 9:17 AM, Rackover, Zvi <zvi.rackover at intel.com>
wrote:
> Hi Sanjay,
>
>
>
> I agree we should also discuss **if** this canonicalization is beneficial.
>
> For starters, do we have a concrete case where we would benefit from
> canonicalizing shuffles <-> truncates in LLVM IR?
>
> IMO, we should not count benefits for codegen
2017 Jul 07
3
trunc nsw/nuw?
Hi,
Even if there are no ways in which a *frontend* can produce nsw
truncs, it may still be useful to have if optimization passes can
usefully attach nsw to truncates (after proving the truncates don't
"overflow"). For instance in
%a = ashr i64 %v, i32 33
%t = trunc %a to i32
the trunc can be marked nsw.
However, the burden of proof here is to show that we can do some
useful
2017 Jan 17
2
IR canonicalization: shufflevector or vector trunc?
We use InstCombiner::ShouldChangeType() to prevent transforms to illegal
integer types, but I'm not sure how that would apply to vector types.
Ie, let's say v256 is a legal type in your example. DataLayout doesn't
appear to specify what configurations of a 256-bit vector are legal, so I
don't think we can currently use that to say v2i128 should be treated
differently than v16i16.
2017 Jul 06
2
trunc nsw/nuw?
According to 6.3.1.3/3 of the C standard (I didn't check C++):
"3 Otherwise, the new type is signed and the value cannot be represented
in it; either the result is implementation-defined or an
implementation-defined signal is raised."
I *think* that means that IF a signal is raised then the signal raised
could be one that you can't guarantee to be able to return from
2024 Feb 08
2
round.Date and trunc.Date not working / implemented
>>>>> Ji?? Moravec
>>>>> on Wed, 7 Feb 2024 10:23:15 +1300 writes:
> This is my first time working with dates, so if the answer is "Duh, work
> with POSIXt", please ignore it.
> Why is not `round.Date` and `trunc.Date` "implemented" for `Date`?
> Is this because `Date` is (mostly) a virtual class setup for a
2011 Feb 15
3
[LLVMdev] How to use ConstantFoldConstantExpression?
Hello,
i need to fold constants, i found that a function ConstantFoldConstantExpression could be used,
however I am not able to make it fold anything. Could you please give me some advice, what I am doing wrong?
My code looks something like this:
//data layout is obtained from clang-generated code for triple arm-none-linux-gnueabi with added v32:32:32
const char* const TARGET_DATA_LAYOUT =
2024 Feb 08
2
round.Date and trunc.Date not working / implemented
> On 8 Feb 2024, at 15:15, Martin Maechler <maechler at stat.math.ethz.ch> wrote:
>
>>>>>> Ji?? Moravec
>>>>>> on Wed, 7 Feb 2024 10:23:15 +1300 writes:
>
>> This is my first time working with dates, so if the answer is "Duh, work
>> with POSIXt", please ignore it.
>
>> Why is not `round.Date` and
2017 Jan 13
2
IR canonicalization: shufflevector or vector trunc?
Right - I think that case looks like this for little endian:
define <2 x i32> @zextshuffle(<2 x i16> %x) {
%zext_shuffle = shufflevector <2 x i16> %x, <2 x i16> zeroinitializer, <4
x i32> <i32 0, i32 2, i32 1, i32 2>
%bc = bitcast <4 x i16> %zext_shuffle to <2 x i32>
ret <2 x i32> %bc
}
define <2 x i32> @zextvec(<2 x i16>