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scalarrepl
2013 Nov 11
0
[LLVMdev] Custom LegalizeTypeAction?
...isters to
store predicate values (vector comparisons results are also stored as
a bit mask in a scalar register). I've currently specified that
scalar registers can be either of type v16i1 (for predicates; vectors
have 16 elements) or i32, which would allow them to work in either
context:
def ScalarReg : RegisterClass<"VP", [i32, v16i1…
I soon realized this has an onerous side effect. Since vector
comparison results (of type v16i1) can be used in arithmetic, most
instructions that deal with scalar registers need to have a patterns
for every permutation of v16i1 and i32 parameters....