Displaying 3 results from an estimated 3 matches for "inj_virq".
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bind_virq
2009 Feb 10
7
hang on restore in 3.3.1
...9633 (+ 4101) VMEXIT [ dom:vcpu = 0x00000062,
exitcode = 0x0000004e, rIP = 0x0000000080a562b9 ]
CPU0 0 (+ 0) MMIO_AST_WR [ address = 0xfee000b0, data =
0x00000000 ]
CPU0 0 (+ 0) PF_XEN [ dom:vcpu = 0x00000062, errorcode =
0x0b, virt = 0xfffe00b0 ]
CPU0 0 (+ 0) INJ_VIRQ [ dom:vcpu = 0x00000062, vector = 0x00,
fake = 1 ]
CPU0 200130258185932 (+ 6299) VMENTRY [ dom:vcpu = 0x00000062 ]
CPU0 200130258189737 (+ 3805) VMEXIT [ dom:vcpu = 0x00000062,
exitcode = 0x00000064, rIP = 0x0000000080a560ad ]
CPU0 0 (+ 0) INJ_VIRQ [ dom:vcpu = 0x0...
2012 Sep 14
0
[ PATCH v3 2/3] xen: enable Virtual-interrupt delivery
..._vmx.eoi_exit_bitmap[e]);}}
+#endif
+ UPDATE_EOI_EXITMAP(v, 0);
+ UPDATE_EOI_EXITMAP(v, 1);
+ UPDATE_EOI_EXITMAP(v, 2);
+ UPDATE_EOI_EXITMAP(v, 3);
+ }
+
+ pt_intr_post(v, intack);
+ }
else
{
HVMTRACE_2D(INJ_VIRQ, intack.vector, /*fake=*/ 0);
@@ -262,11 +319,16 @@ void vmx_intr_assist(void)
/* Is there another IRQ to queue up behind this one? */
intack = hvm_vcpu_has_pending_irq(v);
- if ( unlikely(intack.source != hvm_intsrc_none) )
- enable_intr_window(v, intack);
+ if ( !cpu_has_...
2013 Aug 22
9
[PATCH v3 0/4] Nested VMX: APIC-v related bug fixing
From: Yang Zhang <yang.z.zhang@Intel.com>
The following patches fix the issue that fail to boot L2 guest on APIC-v
available machine. The main problem is that with APIC-v, virtual interrupt inject
L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running,
L1 will detect interrupt through vmexit with reason external interrupt. If this happens,
we should update