[opus] OPUS implementation with FPGA

Benjamin Schwartz
Sat, 05 Oct 2013 21:40:38 -0000

I'm not aware of an FPGA implementations yet.  You could be the first!

An encoder implementation would be much easier, because there are almost no
rules about encoders.  An encoder is free to behave any way it wants, so
you could implement a very small subset of Opus and still have a compliant
(and useful) encoder.

A decoder implementation would be much harder, because decoders are
required to implement the entire standard, at all modes, samplerates,
bitrates, stereo/mono, etc.  However, an HDL implementation of a decoder
would be more impressive, and maybe more useful to others.

I recommend starting with an encoder.


On Fri, Oct 4, 2013 at 2:15 AM, Fredrik Bonde <Fredrik.Bonde at
ascom.se>wrote:

>  ** **
>
>                 Hi,****
>
> ** **
>
> We would like to use the OPUS codec @ 16 kHz sampling rate and max 32
> kbps. ****
>
> ** **
>
> What about implementing an OPUS coder and decoder in an FPGA? Has this
> been done? Would either coder or decoder more suitable for FPGA
> implementation? ****
>
> ** **
>
> Best regards****
>
> Fredrik Bonde****
>
> ** **
>
> _______________________________________________
> opus mailing list
> opus at xiph.org
> http://lists.xiph.org/mailman/listinfo/opus
>
>
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