[llvm-dev] Spill/Reload Instructions Due To Caller Saving Registers

Nemanja Ivanovic via llvm-dev
Tue, 09 Mar 2021 15:49:25 -0000

Doesn't TargetInstrInfo::isStoreToStackSlot() tell you if the instruction
is a spill? Or are you looking to identify spill/reload instructions after
frame indices are eliminated?

On Mon, Mar 8, 2021 at 9:32 AM Armand Behroozi via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hello,
>
> I'm trying to identify which spill/reload instructions save/reload
virtual
> registers that are live across function calls. In other words, if a virtual
> reg is spilled before a call, reloaded after, and live during the call, I
> want to remember it.
>
> I've figured out how to determine if a virtual register has its live
range
> across a call instruction: I use the
"checkRegMaskInterference(VirtReg)"
> method. Then, if storeRegToStackSlot or loadRegFromStackSlot is called
> while there's regmask interference, I know that a spill/reload
instruction
> was created as well and mark its MCInstrDesc as fitting my criteria.
>
> The issue I'm facing is that I don't know how to propagate this
> information from the RegAlloc stage to the end of the codegen pipeline as
> instructions are frequently created and destroyed, so the instructions and
> their MCInstrDesc don't survive until the end of
"addPreEmitPass2."
>
> Any thoughts on how to tackle this challenge would be greatly appreciated.
>
> Thank you.
>
> Regards,
>
> Armand Behroozi
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