[llvm-dev] ARM64, dropping ADRP instructions, and ld.lld

Tim Northover via llvm-dev
2018-05-21T13:04:06Z

On 21 May 2018 at 13:57, Bruce Hoult via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> "ADRL produces position-independent code, because the address is
calculated
> relative to PC."
>
> From this, I'd expect ADRP to simply do Xd <- PC + n*4096, where n
is a 20
> bit number, just like AUIPC in RISC-V (also a 20 literal multiplied by
4096)
> or AUIPC in MIPS (16 bits multiplied by 65636 there).

Afraid not. It really is (PC & ~0xfff) + n * 0x1000. So it does
require 12-bit alignment of any code section.

Now that you mention the MIPS & RISC-V alternatives, I'm not sure why
ARM actually made that choice. It obviously saves you a handful of
transistors but I can't quite believe that's all there is to it.

Cheers.

Tim.