[llvm-dev] retpoline mitigation and 6.0

David Woodhouse via llvm-dev
2018-02-07T23:26:53Z

On Wed, 2018-02-07 at 21:55 +0000, David Woodhouse via llvm-dev
wrote:
> Can you take care of filing the tickets for %V0 and "=q"
> and attribute__((indirect_branch("keep"))) please? With those
fixed, I
> think we should be OK again.

Here's %V0 support, which makes the hypervisor guest support build.

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 4da7d59df46..f498c098288 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -370,6 +370,8 @@ static void printIntelMemReference(X86AsmPrinter &P,
const MachineInstr *MI,
 static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand
&MO,
                               char Mode, raw_ostream &O) {
   unsigned Reg = MO.getReg();
+  bool emit_pct = true;
+
   switch (Mode) {
   default: return true;  // Unknown mode.
   case 'b': // Print QImode register
@@ -384,6 +386,9 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
MachineOperand &MO,
   case 'k': // Print SImode register
     Reg = getX86SubSuperRegister(Reg, 32);
     break;
+  case 'V':
+    emit_pct = false;
+    /* fall through */
   case 'q':
     // Print 64-bit register names if 64-bit integer registers are available.
     // Otherwise, print 32-bit register names.
@@ -391,7 +396,10 @@ static bool printAsmMRegister(X86AsmPrinter &P, const
MachineOperand &MO,
     break;
   }

-  O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
+  if (emit_pct)
+    O << '%';
+
+  O << X86ATTInstPrinter::getRegisterName(Reg);
   return false;
 }

@@ -464,6 +472,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI,
unsigned OpNo,
     case 'w': // Print HImode register
     case 'k': // Print SImode register
     case 'q': // Print DImode register
+    case 'V': // Print native register without '%'
       if (MO.isReg())
         return printAsmMRegister(*this, MO, ExtraCode[0], O);
       printOperand(*this, MI, OpNo, O);

--
dwmw2