[llvm-dev] InstCombine question on combineLoadToOperationType

Pete Couperus via llvm-dev
Wed, 16 Nov 2016 00:22:02 -0000

Hello,

Context: We have a backend where v32i1 is a Legal type, but the storage for
v32i1 is not 32-bits/uses a different instruction sequence.
We ran into an issue because combineLoadToOperationType changed v32i1 loads into
i32 loads, so a sequence like:
define void @bits(<32 x i1>* %A, <32 x i1>* %B) {
  %a = load <32 x i1>, <32 x i1>* %A
  store <32 x i1> %a, <32 x i1>* %B
  ret void
}

Is transformed to:
define void @bits(<32 x i1>* %A, <32 x i1>* %B) {
  %1 = bitcast <32 x i1>* %A to i32*
  %a1 = load i32, i32* %1, align 4
  %2 = bitcast <32 x i1>* %B to i32*
  store i32 %a1, i32* %2, align 4
  ret void
}

This looks to be intentional.
Is there a way to specify in the data-layout that v32i1 storage is not 32-bits?
Absent that, is there any other reliable way to retain the original vector
loads/store without just disabling this part of InstCombine?
Or is it the backend's responsibility to try and work with this?
Thanks!

Pete

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