[llvm-dev] Experimental 6502 backend; memory operand folding problem

Krzysztof Parzyszek via llvm-dev
Fri, 12 Feb 2016 13:54:16 -0000

On 2/12/2016 7:23 AM, Bruce Hoult via llvm-dev wrote:
> I haven't seen what you are doing, but if I was writing a back end for
> the 6502, I'd lie to LLVM and describe RAM page 0 as being the real
> registers, and A, X and Y as being special purpose registers used for
> temporaries.

How did you get the "(z), x" and "(z, y)" addressing modes
to work with
this scheme?  The "z" is two adjacent zero-page bytes---did you model
16-bit registers as all possible pairs of adjacent 0p addresses?

-Krzysztof

--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation