[llvm-dev] Invalid instruction generated on armV4

Frédéric Richez via llvm-dev
2015-09-11T11:41:02Z

I’m using rust head version that currently use llvm 3.7 …

Thanks.

Frédéric.

> On 11 Sep 2015, at 13:29, Bruce Hoult <bruce at hoult.org> wrote:
>
> What LLVM version are you using?
>
> There were some bugs around switching ARM/Thumb mode on ARMv4 fixed in 3.6.
>
> On Fri, Sep 11, 2015 at 1:20 PM, Frédéric Richez <llvm-dev at
lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
> I’m tying to run a rust application on armv4 architecture (arm720tdmi).
> Rust is using llvm to generate native code.
> Some programs are running well on the target but for more complex
applications I receive a Illegal instruction :
> gdb disassembling the core dump file gives :
>
>    0x401e41dc <+0>:	push	{r11, lr}
>    0x401e41e0 <+4>:	mov	r11, sp
>    0x401e41e4 <+8>:	sub	sp, sp, #8
>    0x401e41e8 <+12>:	ldr	r0, [r0]
>    0x401e41ec <+16>:	str	r0, [sp, #4]
>    0x401e41f0 <+20>:	mov	r0, r1
>    0x401e41f4 <+24>:	ldr	r1, [sp, #4]
> => 0x401e41f8 <+28>:	blx	r1
>    0x401e41fc <+32>:	and	r0, r0, #1
>    0x401e4200 <+36>:	and	r0, r0, #1
>    0x401e4204 <+40>:	mov	sp, r11
>    0x401e4208 <+44>:	pop	{r11, lr}
>    0x401e420c <+48>:	bx	lr
> blx instruction is available from ARM architecture v5 and above…
>
> After lot of investigations I found where llvm is generating this
instruction :
>
https://github.com/rust-lang/llvm/blob/168f91ce5cbf8933e47f339911f0f46a48714852/lib/Target/ARM/ARMFastISel.cpp#L2395
<https://github.com/rust-lang/llvm/blob/168f91ce5cbf8933e47f339911f0f46a48714852/lib/Target/ARM/ARMFastISel.cpp#L2395>
> UseReg variable is true causing ARMSelectCallOp function to set a BLX
instruction that is not supported on armv4 :-(
>
> Could you help me to solve this ?
>
> Many thanks
>
> Frédéric.
>
>
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