[LLVMdev] Proposal for new Legalization framework

reed kotler
Thu, 25 Apr 2013 01:27:43 -0000

On 04/24/2013 05:26 PM, Chris Lattner wrote:
> On Apr 24, 2013, at 5:01 PM, Dan Gohman <dan433584 at gmail.com>
wrote:
>> In the spirit of the (long-term) intent to migrate away from the
SelectionDAG framework, it is desirable to implement legalization passes as
discrete passes. Attached is a patch which implements the beginning of a new
type legalization pass, to help motivate discussion.
>
> This is a great discussion to have.
>
>> Is LLVM IR the right level for this?
>
> IMO, no, definitely not.
>
>> The main alternative approach that's been discussed is to do
FastISel to a target-independent opcode set on MachineInstrs, and then do
legalization and ultimately the last phase off instruction selection proper
after that. The most obvious advantage of using LLVM IR for legalization is that
it's (currently) more developer-friendly. The most obvious advantage of
using MachineInstrs is that they would make it easier to do low-level
manipulations. Also, doing legalization on MachineInstrs would mean avoiding
having LLVM-IR-level optimization passes which lower the IR, which has
historically been a design goal of LLVM.
>
> I think that you (in the rest of your email) identify a number of specific
problems with using LLVM IR for legalization.  These are a lot of specific
issues caused by the fact that LLVM IR is intentionally not trying to model
machine issues.  I'm sure you *could* try to make this work by introducing a
bunch of new intrinsics into LLVM IR which would model the union of the
selection dag ISD nodes along with the target specific X86ISD nodes.  However,
at this point, you have only modeled the operations and haven't modeled the
proper type system.
>
> LLVM IR is just not the right level for this.  You seem to think it is
better than MachineInstrs because of developer friendliness, but it isn't
clear to me that LLVM IR with the additions you're talking about would
actually be friendly anymore :-)
>
> Personally, I think that the right representation for legalization is
MachineInstrs supplemented with a type system that allows MVTs as well as
register classes.  If you are seriously interested in pushing forward on this,
we should probably discuss it in person, or over beer at the next social or
something.
>
> -Chris
>

I would really push towards doing this in LLVM IR as the next step.

It's possible that what you are proposing is the right "long term"
solution but I think it's not a good evolutionary approach; it's more
revolutionary.

I've already thought of many things that could be very clearly and
easily done in IR that are done in very convoluted ways in Selection
DAG. This kind of migration could take place right now and as we thin
out the selection DAG portion of things to where it is almost non
existent, making a jump to just eliminate it and replacing it would be
more practical.


Something like soft float for example is nearly trivial to do in IR.

At the risk of appearing stupid, I can say that I've really struggled to
understand selection DAG and all it's facets and interaction with table
gen patterns, and this after having done a whole port from scratch
already by myself.

Part of it is the lack of documentation but also there are too many
illogical things (to me) and special cases and hacks surrounding
selection DAG and tablegen.

On the other hand, I recently started to write some IR level passes and
it was nearly trivial for me to understand how to use it and transform
it. All the classes are more or less very clean, logical and regular. I
was writing transformation passes on the first day with no issues.

I think that LLVM IR could be extended to allow for all the things in
legalization to take place and many other parts of lowering, i.e.
lowering to use some IR which has additional lower level operations.

Reed