[LLVMdev] Bug in visitSIGN_EXTEND in DAGCombiner.cpp?

Nadav Rotem
Fri, 08 Mar 2013 22:29:46 -0000

Hi Richard,


> visitSIGN_EXTEND() in DAGCombiner.cpp generates an ISD::SELECT even if VT
is a vector, which causes ExpandSELECT() to assert during legalization.
> I think what's required is to have visitSIGN_EXTEND generate a VSELECT
if VT is a vector…

ISD::SELECT should be used for cases where the selector is a scalar, even if the
operands are vector. If you found a case where SELECT is used with a vector
operand then this is a bug. We should probably add an assert in
SelectionDAG::getNode().

>
> I've tried a local change that cures this particular assert, but
uncovers another assert later, so I'm a bit uncertain if I'm heading off
in the wrong direction.

I think that replacing SELECT with VSELECT is the right thing to do.

> The subsequent assert comes in ExpandVSELECT, which expects (for no good
reason as far as I can tell) that the "mask" (really the
'selector') and the operands will be the same width, rather than trying
to make them the same width (in our problem cases, the mask is an i32 produced
from getSetCCResultType() and the ops are i8 or i16 - all vectors of the same
length, of course.)

If I remember correctly the trick of expanding VSELECT into a sequence of
XOR/AND/OR only works if the mask is known to be all-one or all-zero.

>
> I don't really want to fix that, as the generated XOR/AND/AND/OR
sequence isn't desirable at all for our target, which has an instruction
that I think does precisely VSELECT…
>
> Richard
>
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