[LLVMdev] x86 cogen quality

Finn S Andersen
Thu, 22 Apr 2004 08:24:01 -0000

Alkis Evlogimenos wrote:

>On Wed, Apr 21, 2004 at 11:01:48AM +0200, Finn S Andersen wrote:
>
>
>>For some of the benchmarks the linear scan regalloc
>>works. When it does, results are in the x1.0 - 1.5
>>range. Unfortunately, the linear scan allocator breaks
>>on most of my code.
>>
>>
>
>Is there a chance you can try cvs? I would be interested to
>get a simplified test case where the allocator breaks. A lot of
>improvements went into the x86 backend since 1.2 and we currently have
>no test cases where the allocator breaks today.
>
>
I would, if I could.

However, it seems that there is a lot of changes since release 1.2.
The cvsweb interface only allow me to download one file at a time.
I have grabbed "llvm/lib/CodeGen/RegAllocLinearScan.cpp" and
run make and make install.

But the problem is still there. The error message says:
   lli: /home/finna/llvm/llvm/include/llvm/Target/MRegisterInfo.h:144:
   static bool llvm::MRegisterInfo::isPhysicalRegister(unsigned int):
   Assertion `Reg && "this is not a register!"' failed.

But trying cvsweb I cannot locate the file mentioned above. I guess
you have removed it which likely means there are many files I should
update.
Bus cvsweb is not the right interface for that.

How do I proceed ?

Best regards
/Finn