John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 0/5] gpu: nova-core: Hopper/Blackwell prerequisites
Hi,
I'm posting this now, instead of with the upcoming full Hopper/Blackwell
series, because this includes some HAL improvements here that will
undoubtedly interact "a little bit" with Timur Tabi's Turing
support
patchset [1].
Changes in v2:
0) Rebased on top of today's drm-rust-next.
1) Use a new FbRange newtype, in order to clean up the implementation of
printing ranges with sizes. (Thanks to Alex Courbot's suggestion.)
2) Combined the Hopper and Blackwell HAL additions, into a single patch,
as recommended by Timur Tabi.
3) Used a separate patch to change the "use" lines to vertical format.
That patch is already a commit in drm-rust-next, so this series builds
on top of that.
4) Dropped one patch entirely, because the boot0/boot42 commits fixed
up everything already.
As implied above, this is based on top of today's drm-rust-next. There
is also a branch, for convenience in reviewing:
https://github.com/johnhubbard/linux/tree/nova-core-blackwell-prereqs-v2
[1] https://lore.kernel.org/20251114233045.2512853-1-ttabi at nvidia.com
************************************************************************
Here's the original cover letter, edited slightly (removed the link
to the v0 series, to avoid anyone going there by mistake):
I've based these Hopper/Blackwell prerequisites on top of Joel's and
Alex's changes, and also on top of my recent boot0/boot42 changes.
This makes it easier for both Timur Tabi to post his Turing support
(which he's about ready to do), and for me to post the actual
Hopper/Blackwell support, without generating conflicts.
Testing: This works as expected on Ampere and Blackwell (bare metal),
on my local test machine.
John Hubbard (5):
gpu: nova-core: print FB sizes, along with ranges
gpu: nova-core: add FbRange.len() and use it in boot.rs
gpu: nova-core: Hopper/Blackwell: basic GPU identification
nova-core: factor .fwsignature* selection into a new
get_gsp_sigs_section()
gpu: nova-core: use GPU Architecture to simplify HAL selections
drivers/gpu/nova-core/falcon/hal.rs | 19 ++++---
drivers/gpu/nova-core/fb.rs | 72 ++++++++++++++++++++-------
drivers/gpu/nova-core/fb/hal.rs | 18 +++----
drivers/gpu/nova-core/firmware/gsp.rs | 30 +++++++++--
drivers/gpu/nova-core/gpu.rs | 22 ++++++++
drivers/gpu/nova-core/gsp/boot.rs | 2 +-
6 files changed, 125 insertions(+), 38 deletions(-)
base-commit: 57dc2ea0b7bdb828c5d966d9135c28fe854933a4
--
2.52.0
John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 1/5] gpu: nova-core: print FB sizes, along with ranges
For convenience of the reader: now you can directly see the sizes of
each range. It is suprising just how much this helps.
Sample output (using an Ampere GA104):
NovaCore 0000:e1:00.0: FbLayout {
fb: 0x0..0x3ff800000 (16376 MB),
vga_workspace: 0x3ff700000..0x3ff800000 (1 MB),
frts: 0x3ff600000..0x3ff700000 (1 MB),
boot: 0x3ff5fa000..0x3ff600000 (0 MB),
elf: 0x3fb960000..0x3ff5f9000 (60 MB),
wpr2_heap: 0x3f3900000..0x3fb900000 (128 MB),
wpr2: 0x3f3800000..0x3ff700000 (191 MB),
heap: 0x3f3700000..0x3f3800000 (1 MB),
vf_partition_count: 0x0,
}
Signed-off-by: John Hubbard <jhubbard at nvidia.com>
---
drivers/gpu/nova-core/fb.rs | 66 +++++++++++++++++++++++++++----------
1 file changed, 49 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs
index 3c9cf151786c..333e952400e6 100644
--- a/drivers/gpu/nova-core/fb.rs
+++ b/drivers/gpu/nova-core/fb.rs
@@ -1,9 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
-use core::ops::Range;
+use core::ops::{
+ Deref,
+ Range, //
+};
use kernel::{
device,
+ fmt,
prelude::*,
ptr::{
Alignable,
@@ -94,26 +98,54 @@ pub(crate) fn unregister(&self, bar: &Bar0) {
}
}
+pub(crate) struct FbRange(Range<u64>);
+
+impl From<Range<u64>> for FbRange {
+ fn from(range: Range<u64>) -> Self {
+ Self(range)
+ }
+}
+
+impl Deref for FbRange {
+ type Target = Range<u64>;
+
+ fn deref(&self) -> &Self::Target {
+ &self.0
+ }
+}
+
+impl fmt::Debug for FbRange {
+ fn fmt(&self, f: &mut fmt::Formatter<'_>) ->
fmt::Result {
+ let size_mb = (self.0.end - self.0.start) >> 20;
+ f.write_fmt(fmt!(
+ "{:#x}..{:#x} ({} MB)",
+ self.0.start,
+ self.0.end,
+ size_mb
+ ))
+ }
+}
+
/// Layout of the GPU framebuffer memory.
///
/// Contains ranges of GPU memory reserved for a given purpose during the GSP
boot process.
#[derive(Debug)]
pub(crate) struct FbLayout {
/// Range of the framebuffer. Starts at `0`.
- pub(crate) fb: Range<u64>,
+ pub(crate) fb: FbRange,
/// VGA workspace, small area of reserved memory at the end of the
framebuffer.
- pub(crate) vga_workspace: Range<u64>,
+ pub(crate) vga_workspace: FbRange,
/// FRTS range.
- pub(crate) frts: Range<u64>,
+ pub(crate) frts: FbRange,
/// Memory area containing the GSP bootloader image.
- pub(crate) boot: Range<u64>,
+ pub(crate) boot: FbRange,
/// Memory area containing the GSP firmware image.
- pub(crate) elf: Range<u64>,
+ pub(crate) elf: FbRange,
/// WPR2 heap.
- pub(crate) wpr2_heap: Range<u64>,
+ pub(crate) wpr2_heap: FbRange,
/// WPR2 region range, starting with an instance of `GspFwWprMeta`.
- pub(crate) wpr2: Range<u64>,
- pub(crate) heap: Range<u64>,
+ pub(crate) wpr2: FbRange,
+ pub(crate) heap: FbRange,
pub(crate) vf_partition_count: u8,
}
@@ -125,7 +157,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
let fb = {
let fb_size = hal.vidmem_size(bar);
- 0..fb_size
+ FbRange(0..fb_size)
};
let vga_workspace = {
@@ -152,7 +184,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
}
};
- vga_base..fb.end
+ FbRange(vga_base..fb.end)
};
let frts = {
@@ -160,7 +192,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
const FRTS_SIZE: u64 = usize_as_u64(SZ_1M);
let frts_base = vga_workspace.start.align_down(FRTS_DOWN_ALIGN) -
FRTS_SIZE;
- frts_base..frts_base + FRTS_SIZE
+ FbRange(frts_base..frts_base + FRTS_SIZE)
};
let boot = {
@@ -168,7 +200,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
let bootloader_size =
u64::from_safe_cast(gsp_fw.bootloader.ucode.size());
let bootloader_base = (frts.start -
bootloader_size).align_down(BOOTLOADER_DOWN_ALIGN);
- bootloader_base..bootloader_base + bootloader_size
+ FbRange(bootloader_base..bootloader_base + bootloader_size)
};
let elf = {
@@ -176,7 +208,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
let elf_size = u64::from_safe_cast(gsp_fw.size);
let elf_addr = (boot.start - elf_size).align_down(ELF_DOWN_ALIGN);
- elf_addr..elf_addr + elf_size
+ FbRange(elf_addr..elf_addr + elf_size)
};
let wpr2_heap = {
@@ -185,7 +217,7 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0, gsp_fw:
&GspFirmware) -> Result<
gsp::LibosParams::from_chipset(chipset).wpr_heap_size(chipset,
fb.end);
let wpr2_heap_addr = (elf.start -
wpr2_heap_size).align_down(WPR2_HEAP_DOWN_ALIGN);
- wpr2_heap_addr..(elf.start).align_down(WPR2_HEAP_DOWN_ALIGN)
+
FbRange(wpr2_heap_addr..(elf.start).align_down(WPR2_HEAP_DOWN_ALIGN))
};
let wpr2 = {
@@ -193,13 +225,13 @@ pub(crate) fn new(chipset: Chipset, bar: &Bar0,
gsp_fw: &GspFirmware) -> Result<
let wpr2_addr = (wpr2_heap.start -
u64::from_safe_cast(size_of::<gsp::GspFwWprMeta>()))
.align_down(WPR2_DOWN_ALIGN);
- wpr2_addr..frts.end
+ FbRange(wpr2_addr..frts.end)
};
let heap = {
const HEAP_SIZE: u64 = usize_as_u64(SZ_1M);
- wpr2.start - HEAP_SIZE..wpr2.start
+ FbRange(wpr2.start - HEAP_SIZE..wpr2.start)
};
Ok(Self {
--
2.52.0
John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 2/5] gpu: nova-core: add FbRange.len() and use it in boot.rs
A tiny simplification: now that FbLayout uses its own specific FbRange
type, add an FbRange.len() method, and use that to (very slightly)
simplify the calculation of Frts::frts_size initialization.
Suggested-by: Alexandre Courbot <acourbot at nvidia.com>
Signed-off-by: John Hubbard <jhubbard at nvidia.com>
---
drivers/gpu/nova-core/fb.rs | 6 ++++++
drivers/gpu/nova-core/gsp/boot.rs | 2 +-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs
index 333e952400e6..9fcd915e12e1 100644
--- a/drivers/gpu/nova-core/fb.rs
+++ b/drivers/gpu/nova-core/fb.rs
@@ -100,6 +100,12 @@ pub(crate) fn unregister(&self, bar: &Bar0) {
pub(crate) struct FbRange(Range<u64>);
+impl FbRange {
+ pub(crate) fn len(&self) -> u64 {
+ self.0.end - self.0.start
+ }
+}
+
impl From<Range<u64>> for FbRange {
fn from(range: Range<u64>) -> Self {
Self(range)
diff --git a/drivers/gpu/nova-core/gsp/boot.rs
b/drivers/gpu/nova-core/gsp/boot.rs
index 54937606b5b0..846064221931 100644
--- a/drivers/gpu/nova-core/gsp/boot.rs
+++ b/drivers/gpu/nova-core/gsp/boot.rs
@@ -70,7 +70,7 @@ fn run_fwsec_frts(
bios,
FwsecCommand::Frts {
frts_addr: fb_layout.frts.start,
- frts_size: fb_layout.frts.end - fb_layout.frts.start,
+ frts_size: fb_layout.frts.len(),
},
)?;
--
2.52.0
John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 3/5] gpu: nova-core: Hopper/Blackwell: basic GPU identification
Hopper (GH100) and Blackwell identification, including ELF
.fwsignature_* items.
Signed-off-by: John Hubbard <jhubbard at nvidia.com>
---
drivers/gpu/nova-core/falcon/hal.rs | 3 ++-
drivers/gpu/nova-core/fb/hal.rs | 5 ++---
drivers/gpu/nova-core/firmware/gsp.rs | 17 +++++++++++++++++
drivers/gpu/nova-core/gpu.rs | 22 ++++++++++++++++++++++
4 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon/hal.rs
b/drivers/gpu/nova-core/falcon/hal.rs
index 8dc56a28ad65..82558af1b927 100644
--- a/drivers/gpu/nova-core/falcon/hal.rs
+++ b/drivers/gpu/nova-core/falcon/hal.rs
@@ -50,7 +50,8 @@ pub(super) fn falcon_hal<E: FalconEngine + 'static>(
use Chipset::*;
let hal = match chipset {
- GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 |
AD107 => {
+ GA102 | GA103 | GA104 | GA106 | GA107 | GH100 | AD102 | AD103 | AD104 |
AD106 | AD107
+ | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 => {
KBox::new(ga102::Ga102::<E>::new(), GFP_KERNEL)? as
KBox<dyn FalconHal<E>>
}
_ => return Err(ENOTSUPP),
diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal.rs
index aba0abd8ee00..71fa92d1b709 100644
--- a/drivers/gpu/nova-core/fb/hal.rs
+++ b/drivers/gpu/nova-core/fb/hal.rs
@@ -34,8 +34,7 @@ pub(super) fn fb_hal(chipset: Chipset) -> &'static
dyn FbHal {
match chipset {
TU102 | TU104 | TU106 | TU117 | TU116 => tu102::TU102_HAL,
GA100 => ga100::GA100_HAL,
- GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 |
AD107 => {
- ga102::GA102_HAL
- }
+ GA102 | GA103 | GA104 | GA106 | GA107 | GH100 | AD102 | AD103 | AD104 |
AD106 | AD107
+ | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 =>
ga102::GA102_HAL,
}
}
diff --git a/drivers/gpu/nova-core/firmware/gsp.rs
b/drivers/gpu/nova-core/firmware/gsp.rs
index 0549805282ab..547f46b6655b 100644
--- a/drivers/gpu/nova-core/firmware/gsp.rs
+++ b/drivers/gpu/nova-core/firmware/gsp.rs
@@ -164,7 +164,24 @@ pub(crate) fn new<'a, 'b>(
let sigs_section = match chipset.arch() {
Architecture::Ampere => ".fwsignature_ga10x",
+ Architecture::Hopper => ".fwsignature_gh10x",
Architecture::Ada => ".fwsignature_ad10x",
+ Architecture::Blackwell => {
+ // Distinguish between GB10x and GB20x series
+ match chipset {
+ // GB10x series: GB100, GB102
+ Chipset::GB100 | Chipset::GB102 =>
".fwsignature_gb10x",
+ // GB20x series: GB202, GB203, GB205, GB206, GB207
+ Chipset::GB202
+ | Chipset::GB203
+ | Chipset::GB205
+ | Chipset::GB206
+ | Chipset::GB207 => ".fwsignature_gb20x",
+ // Non-Blackwell chipsets, which can't happen here, but
Rust doesn't know that.
+ _ => return Err(ENOTSUPP),
+ }
+ }
+
_ => return Err(ENOTSUPP),
};
let signatures = elf::elf64_section(fw.data(), sigs_section)
diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index 629c9d2dc994..c21ce91924f5 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -83,12 +83,22 @@ fn try_from(value: u32) -> Result<Self,
Self::Error> {
GA104 = 0x174,
GA106 = 0x176,
GA107 = 0x177,
+ // Hopper
+ GH100 = 0x180,
// Ada
AD102 = 0x192,
AD103 = 0x193,
AD104 = 0x194,
AD106 = 0x196,
AD107 = 0x197,
+ // Blackwell
+ GB100 = 0x1a0,
+ GB102 = 0x1a2,
+ GB202 = 0x1b2,
+ GB203 = 0x1b3,
+ GB205 = 0x1b5,
+ GB206 = 0x1b6,
+ GB207 = 0x1b7,
});
impl Chipset {
@@ -100,9 +110,17 @@ pub(crate) fn arch(&self) -> Architecture {
Self::GA100 | Self::GA102 | Self::GA103 | Self::GA104 | Self::GA106
| Self::GA107 => {
Architecture::Ampere
}
+ Self::GH100 => Architecture::Hopper,
Self::AD102 | Self::AD103 | Self::AD104 | Self::AD106 | Self::AD107
=> {
Architecture::Ada
}
+ Self::GB100
+ | Self::GB102
+ | Self::GB202
+ | Self::GB203
+ | Self::GB205
+ | Self::GB206
+ | Self::GB207 => Architecture::Blackwell,
}
}
}
@@ -132,7 +150,9 @@ pub(crate) enum Architecture {
#[default]
Turing = 0x16,
Ampere = 0x17,
+ Hopper = 0x18,
Ada = 0x19,
+ Blackwell = 0x1b,
}
impl TryFrom<u8> for Architecture {
@@ -142,7 +162,9 @@ fn try_from(value: u8) -> Result<Self> {
match value {
0x16 => Ok(Self::Turing),
0x17 => Ok(Self::Ampere),
+ 0x18 => Ok(Self::Hopper),
0x19 => Ok(Self::Ada),
+ 0x1b => Ok(Self::Blackwell),
_ => Err(ENODEV),
}
}
--
2.52.0
John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 4/5] nova-core: factor .fwsignature* selection into a new get_gsp_sigs_section()
Keep Gsp::new() from getting too cluttered, by factoring out the
selection of .fwsignature* items. This will continue to grow as we add
GPUs.
Signed-off-by: John Hubbard <jhubbard at nvidia.com>
---
drivers/gpu/nova-core/firmware/gsp.rs | 43 ++++++++++++++-------------
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/nova-core/firmware/gsp.rs
b/drivers/gpu/nova-core/firmware/gsp.rs
index 547f46b6655b..86ed4d650d05 100644
--- a/drivers/gpu/nova-core/firmware/gsp.rs
+++ b/drivers/gpu/nova-core/firmware/gsp.rs
@@ -151,39 +151,42 @@ pub(crate) struct GspFirmware {
}
impl GspFirmware {
- /// Loads the GSP firmware binaries, map them into `dev`'s
address-space, and creates the page
- /// tables expected by the GSP bootloader to load it.
- pub(crate) fn new<'a, 'b>(
- dev: &'a device::Device<device::Bound>,
- chipset: Chipset,
- ver: &'b str,
- ) -> Result<impl PinInit<Self, Error> + 'a> {
- let fw = super::request_firmware(dev, chipset, "gsp", ver)?;
-
- let fw_section = elf::elf64_section(fw.data(),
".fwimage").ok_or(EINVAL)?;
-
- let sigs_section = match chipset.arch() {
- Architecture::Ampere => ".fwsignature_ga10x",
- Architecture::Hopper => ".fwsignature_gh10x",
- Architecture::Ada => ".fwsignature_ad10x",
+ fn get_gsp_sigs_section(chipset: Chipset) -> Result<&'static
str> {
+ match chipset.arch() {
+ Architecture::Ampere => Ok(".fwsignature_ga10x"),
+ Architecture::Hopper => Ok(".fwsignature_gh10x"),
+ Architecture::Ada => Ok(".fwsignature_ad10x"),
Architecture::Blackwell => {
// Distinguish between GB10x and GB20x series
match chipset {
// GB10x series: GB100, GB102
- Chipset::GB100 | Chipset::GB102 =>
".fwsignature_gb10x",
+ Chipset::GB100 | Chipset::GB102 =>
Ok(".fwsignature_gb10x"),
// GB20x series: GB202, GB203, GB205, GB206, GB207
Chipset::GB202
| Chipset::GB203
| Chipset::GB205
| Chipset::GB206
- | Chipset::GB207 => ".fwsignature_gb20x",
+ | Chipset::GB207 => Ok(".fwsignature_gb20x"),
// Non-Blackwell chipsets, which can't happen here, but
Rust doesn't know that.
- _ => return Err(ENOTSUPP),
+ _ => Err(ENOTSUPP),
}
}
+ _ => Err(ENOTSUPP),
+ }
+ }
- _ => return Err(ENOTSUPP),
- };
+ /// Loads the GSP firmware binaries, map them into `dev`'s
address-space, and creates the page
+ /// tables expected by the GSP bootloader to load it.
+ pub(crate) fn new<'a, 'b>(
+ dev: &'a device::Device<device::Bound>,
+ chipset: Chipset,
+ ver: &'b str,
+ ) -> Result<impl PinInit<Self, Error> + 'a> {
+ let fw = super::request_firmware(dev, chipset, "gsp", ver)?;
+
+ let fw_section = elf::elf64_section(fw.data(),
".fwimage").ok_or(EINVAL)?;
+
+ let sigs_section = Self::get_gsp_sigs_section(chipset)?;
let signatures = elf::elf64_section(fw.data(), sigs_section)
.ok_or(EINVAL)
.and_then(|data| DmaObject::from_data(dev, data))?;
--
2.52.0
John Hubbard
2025-Nov-26 01:39 UTC
[PATCH v2 5/5] gpu: nova-core: use GPU Architecture to simplify HAL selections
Instead of long, exhaustive lists of GPUs ("Chipsets"), use entire
GPU Architectures, such as "Blackwell" or "Turing", to make
HAL choices.
A tiny side effect: moved a "use" statement out of function scope, in
each file, up to the top of the file, as per Rust for Linux conventions.
Signed-off-by: John Hubbard <jhubbard at nvidia.com>
---
drivers/gpu/nova-core/falcon/hal.rs | 20 +++++++++++++-------
drivers/gpu/nova-core/fb/hal.rs | 17 +++++++++--------
2 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/nova-core/falcon/hal.rs
b/drivers/gpu/nova-core/falcon/hal.rs
index 82558af1b927..5c504577b97c 100644
--- a/drivers/gpu/nova-core/falcon/hal.rs
+++ b/drivers/gpu/nova-core/falcon/hal.rs
@@ -9,7 +9,10 @@
FalconBromParams,
FalconEngine, //
},
- gpu::Chipset,
+ gpu::{
+ Architecture,
+ Chipset, //
+ },
};
mod ga102;
@@ -47,14 +50,17 @@ fn signature_reg_fuse_version(
pub(super) fn falcon_hal<E: FalconEngine + 'static>(
chipset: Chipset,
) -> Result<KBox<dyn FalconHal<E>>> {
- use Chipset::*;
-
- let hal = match chipset {
- GA102 | GA103 | GA104 | GA106 | GA107 | GH100 | AD102 | AD103 | AD104 |
AD106 | AD107
- | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 => {
+ let hal = match chipset.arch() {
+ Architecture::Ampere
+ | Architecture::Hopper
+ | Architecture::Ada
+ | Architecture::Blackwell => {
KBox::new(ga102::Ga102::<E>::new(), GFP_KERNEL)? as
KBox<dyn FalconHal<E>>
}
- _ => return Err(ENOTSUPP),
+ Architecture::Turing => {
+ // TODO: Add Turing falcon HAL support
+ return Err(ENOTSUPP);
+ }
};
Ok(hal)
diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal.rs
index 71fa92d1b709..d795ef7ee65d 100644
--- a/drivers/gpu/nova-core/fb/hal.rs
+++ b/drivers/gpu/nova-core/fb/hal.rs
@@ -4,7 +4,10 @@
use crate::{
driver::Bar0,
- gpu::Chipset, //
+ gpu::{
+ Architecture,
+ Chipset, //
+ },
};
mod ga100;
@@ -29,12 +32,10 @@ pub(crate) trait FbHal {
/// Returns the HAL corresponding to `chipset`.
pub(super) fn fb_hal(chipset: Chipset) -> &'static dyn FbHal {
- use Chipset::*;
-
- match chipset {
- TU102 | TU104 | TU106 | TU117 | TU116 => tu102::TU102_HAL,
- GA100 => ga100::GA100_HAL,
- GA102 | GA103 | GA104 | GA106 | GA107 | GH100 | AD102 | AD103 | AD104 |
AD106 | AD107
- | GB100 | GB102 | GB202 | GB203 | GB205 | GB206 | GB207 =>
ga102::GA102_HAL,
+ match chipset.arch() {
+ Architecture::Turing => tu102::TU102_HAL,
+ Architecture::Ampere if chipset == Chipset::GA100 =>
ga100::GA100_HAL,
+ Architecture::Ampere => ga102::GA102_HAL,
+ Architecture::Hopper | Architecture::Ada | Architecture::Blackwell
=> ga102::GA102_HAL,
}
}
--
2.52.0