llvm dev - Apr 2021 - TracksLiveness property and isKill flag

Hi all,

The property TracksLiveness has comment

// TracksLiveness: True when tracking register liveness accurately.
// While this property is set, register liveness information in basic block
// live-in lists and machine instruction operands (e.g. kill flags, implicit
// defs) is accurate. This means it can be used to change the code in ways
// that affect the values in registers, for example by the register
// scavenger.
// When this property is clear, liveness is no longer reliable.

Can I assume that when a MachineFunction has the TracksLiveness
property I can use the isKill flag of a register operand?

But when I try the following test

*** IR Dump After Module Verifier (verify) ***
define i32 @test2(i32* %p, i32 %a, i32 %b, i32 %c) {
entry:
  %0 = add i32 %a, %b
  %1 = add i32 %0, %c
  store i32 %1, i32* %p, align 4
  %sub1 = sub nsw i32 %a, %b
  ret i32 %sub1
}
# *** IR Dump After X86 DAG->DAG Instruction Selection (amdgpu-isel) ***:
# Machine code for function test2: IsSSA, TracksLiveness
Function Live Ins: $rdi in %0, $esi in %1, $edx in %2, $ecx in %3

bb.0.entry:
  liveins: $rdi, $esi, $edx, $ecx
  %3:gr32 = COPY $ecx
  %2:gr32 = COPY $edx
  %1:gr32 = COPY $esi
  %0:gr64 = COPY $rdi
  %4:gr32 = ADD32rr %1:gr32(tied-def 0), %2:gr32, implicit-def dead $eflags
  %5:gr32 = ADD32rr %4:gr32(tied-def 0), %3:gr32, implicit-def dead $eflags
  MOV32mr %0:gr64, 1, $noreg, 0, $noreg, killed %5:gr32 :: (store 4 into %ir.p)
  %6:gr32 = nsw SUB32rr %1:gr32(tied-def 0), %2:gr32, implicit-def dead $eflags
  $eax = COPY %6:gr32
  RET 0, $eax

# End machine code for function test2.

The generated MachineFunction has TracksLiveness property, but for all
virtual registers, only %5 has the correct isKill flag, others don't
have this flag.

Could anyone help to clarify the usage of TracksLiveness and isKill?

thanks a lot!
Guozhi Wei

Hi Carrot,

Kill flags are an optional information and it is not linked to the track
liveness property per se.

Essentially, when looking at individual operands, if a kill flag is present it
must be correct. If there is no kill flag, the operand can be a last use or not.
Also, if you see at least one kill flag within the function, that doesn’t mean
all the kill flags are set.
Bottom line the kill flags are optional, conservatively correct flags.

If you want reliable last use information, I encourage you to use the
LiveIntervals analysis or after regalloc, you can use
llvm::recomputeLivenessFlags.

Regarding TracksLiveness, when this property is true, that means what the
comment says in what you shared :).
More explicitly that means that the MachineFunction properly reflects the
liveness information of all the values in that function:
- live-in sets are correct
- the live intervals analysis if available is correct
- the live variables analysis if available is correct
- definitions are before uses
- …

Cheers,
-Quentin
> On Apr 27, 2021, at 10:09 AM, Carrot Wei via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> Hi all,
> 
> The property TracksLiveness has comment
> 
> // TracksLiveness: True when tracking register liveness accurately.
> // While this property is set, register liveness information in basic block
> // live-in lists and machine instruction operands (e.g. kill flags,
implicit
> // defs) is accurate. This means it can be used to change the code in ways
> // that affect the values in registers, for example by the register
> // scavenger.
> // When this property is clear, liveness is no longer reliable.
> 
> Can I assume that when a MachineFunction has the TracksLiveness
> property I can use the isKill flag of a register operand?
> 
> But when I try the following test
> 
> *** IR Dump After Module Verifier (verify) ***
> define i32 @test2(i32* %p, i32 %a, i32 %b, i32 %c) {
> entry:
>  %0 = add i32 %a, %b
>  %1 = add i32 %0, %c
>  store i32 %1, i32* %p, align 4
>  %sub1 = sub nsw i32 %a, %b
>  ret i32 %sub1
> }
> # *** IR Dump After X86 DAG->DAG Instruction Selection (amdgpu-isel)
***:
> # Machine code for function test2: IsSSA, TracksLiveness
> Function Live Ins: $rdi in %0, $esi in %1, $edx in %2, $ecx in %3
> 
> bb.0.entry:
>  liveins: $rdi, $esi, $edx, $ecx
>  %3:gr32 = COPY $ecx
>  %2:gr32 = COPY $edx
>  %1:gr32 = COPY $esi
>  %0:gr64 = COPY $rdi
>  %4:gr32 = ADD32rr %1:gr32(tied-def 0), %2:gr32, implicit-def dead $eflags
>  %5:gr32 = ADD32rr %4:gr32(tied-def 0), %3:gr32, implicit-def dead $eflags
>  MOV32mr %0:gr64, 1, $noreg, 0, $noreg, killed %5:gr32 :: (store 4 into
%ir.p)
>  %6:gr32 = nsw SUB32rr %1:gr32(tied-def 0), %2:gr32, implicit-def dead
$eflags
>  $eax = COPY %6:gr32
>  RET 0, $eax
> 
> # End machine code for function test2.
> 
> The generated MachineFunction has TracksLiveness property, but for all
> virtual registers, only %5 has the correct isKill flag, others don't
> have this flag.
> 
> Could anyone help to clarify the usage of TracksLiveness and isKill?
> 
> thanks a lot!
> Guozhi Wei
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
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