llvm dev - Jan 2021 - [X86] Is it possible to implicitly promote a virtual subregister to a super?

Hi Tim,

One of the first things I tried was to insert a zero extend 16-to-32-bit
instruction, but that also caused an additional 32-bit physical register to be
generated, which is not what I want.

The actual implementation I'm doing is a bit more complex than the example I
provided for illustrative purposes. In my case, I don't need to care about
the upper bits at all.

Thanks,

Scott

-----Original Message-----
From: Tim Northover <t.p.northover at gmail.com> 
Sent: Wednesday, January 20, 2021 8:08 AM
To: Constable, Scott D <scott.d.constable at intel.com>
Cc: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] [X86] Is it possible to implicitly promote a virtual
subregister to a super?

On Wed, 20 Jan 2021 at 15:53, Constable, Scott D via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> The above will not pass with --verify-machineinstrs and the CMP32rr will
print to something like:
>
> cmpl %ax, %ebx
>
> Is it possible to implicitly “promote” (for lack of a better word) the
16-bit GPR into its 32-bit super?
Not implicitly, you need another vreg with class GR32 and some operation to
widen the narrow one. And actually you probably need that to be a real sign/zero
extension or something because I don't think
x86 clears the high bits of eax when writing to ax, does it?

If it was 32 -> 64 bit, I think the rules are different and rax would be
zero-extended automatically. In that case you could use a SUBREG_TO_REG which
would eventually go away.

Cheers.

Tim.

On Wed, 20 Jan 2021 at 16:30, Constable, Scott D
<scott.d.constable at intel.com> wrote:
> The actual implementation I'm doing is a bit more complex than the
example I provided for illustrative purposes. In my case, I don't need to
care about the upper bits at all.
OK, in that case I think SUBREG_TO_REG is what you want. Something like

BuildMI(MBB, InsertPt, Loc, TII->get(X86::SUBREG_TO_REG), ExtendedReg)
    .addImm(0) // Never been entirely sure what this was here for.
It's always 0.
    .addReg(NarrowReg)
    .addImm(X86::sub_16bit);

then use ExtendedReg (a GR32 vreg) in the compare.

Cheers.

Tim.