llvm dev - Dec 2020 - Global ISel match table

The Global ISel match table is a sequence of 64-bit entries. For the AMDGPU,
there are about 261,000 entries. for the PowerPC, about 32,000.

A significant amount of memory could be saved by reducing the entries to 32
bits. This would require reworking the matcher to deal with 32-bit entries, and
then re-reworking some of the entries to pick up and assemble two 32-bit entries
into one 64-bit integer.

I won't be surprised if there are compelling reasons to keep the entries at
64 bits. I'd like to hear those reasons.

Hi Paul,

On Sat, Dec 12, 2020 at 5:37 PM Paul C. Anagnostopoulos via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> The Global ISel match table is a sequence of 64-bit entries. For the
> AMDGPU, there are about 261,000 entries. for the PowerPC, about 32,000.
>
> A significant amount of memory could be saved by reducing the entries to
> 32 bits. This would require reworking the matcher to deal with 32-bit
> entries, and then re-reworking some of the entries to pick up and assemble
> two 32-bit entries into one 64-bit integer.
>
I was thinking the same thing recently.

By comparison, SelectionDAG's table is even byte-based, it would be
interesting to make the comparison with that as well. Going to byte
granularity surely saves even more space, which is itself a performance
benefit, but may also have a performance cost due to misalignment.
(SelectionDAG also uses dynamic encoding length for integers in places,
which seems a more dubious choice.)

Cheers,
Nicolai


>
> I won't be surprised if there are compelling reasons to keep the
entries
> at 64 bits. I'd like to hear those reasons.
>
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