On Feb 5, 2009, at 12:51 PM, BGB wrote:> > ----- Original Message ----- > From: Villmow, Micah > To: LLVM Developers Mailing List > Sent: Friday, February 06, 2009 5:47 AM > Subject: [LLVMdev] 16 bit floats > > I need to support 16 bit floats for some operations, outside of > datatypes.td and the constants class, is there anything else I will > need to modify to add f16 support? > > probably also code generation (can't give specifics, no real expert > on the LLVM codebase). > this would be because, even if the core typesystem knows of the > type, the codegen might not know how to emit operations on that type. > > now, of note: > in my project (not LLVM based), float16 had not been supported > directly (since it is not known to the CPU), rather, some loader and > saver thunks were used which converted to/from float32 (this used as > the 'internal' representation of the type). in most cases, I would > think this would be faster than directly operating on the float16, > since the CPU supports float32, but float16 would have to be emulated. > > (unless of course newer CPUs are adding native float16 support or > similar?...). >Right. Micah, does your CPU support float16 operations like add/sub etc natively? -Chirs -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090205/0d12c121/attachment.html>
BGB/Chris, I need to do a similar where I convert the 16bit floats to 32bit floats on memory operations for both scalar and vector formats. So can these operations be implemented without adding 16 bit float support natively to LLVM? If so, how? ________________________________ From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Chris Lattner Sent: Thursday, February 05, 2009 12:53 PM To: LLVM Developers Mailing List Subject: Re: [LLVMdev] 16 bit floats On Feb 5, 2009, at 12:51 PM, BGB wrote: ----- Original Message ----- From: Villmow, Micah <mailto:Micah.Villmow at amd.com> To: LLVM Developers Mailing List <mailto:llvmdev at cs.uiuc.edu> Sent: Friday, February 06, 2009 5:47 AM Subject: [LLVMdev] 16 bit floats I need to support 16 bit floats for some operations, outside of datatypes.td and the constants class, is there anything else I will need to modify to add f16 support? probably also code generation (can't give specifics, no real expert on the LLVM codebase). this would be because, even if the core typesystem knows of the type, the codegen might not know how to emit operations on that type. now, of note: in my project (not LLVM based), float16 had not been supported directly (since it is not known to the CPU), rather, some loader and saver thunks were used which converted to/from float32 (this used as the 'internal' representation of the type). in most cases, I would think this would be faster than directly operating on the float16, since the CPU supports float32, but float16 would have to be emulated. (unless of course newer CPUs are adding native float16 support or similar?...). Right. Micah, does your CPU support float16 operations like add/sub etc natively? -Chirs -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090205/a69bcc58/attachment.html>
On Thu, Feb 5, 2009 at 1:34 PM, Villmow, Micah <Micah.Villmow at amd.com> wrote:> I need to do a similar where I convert the 16bit floats to 32bit floats on > memory operations for both scalar and vector formats. So can these > operations be implemented without adding 16 bit float support natively to > LLVM? If so, how?In this case, you only really need two currently unsupported instructions: one that does f16->f32, and one that does f32->f16; adding target intrinsics to do that should be easy. You can make the instrinsics take an i16 so that the type system doesn't have to be aware of f16 values. -Eli
On Feb 5, 2009, at 1:34 PM, Villmow, Micah wrote:> BGB/Chris, > I need to do a similar where I convert the 16bit floats to 32bit > floats on memory operations for both scalar and vector formats. So > can these operations be implemented without adding 16 bit float > support natively to LLVM? If so, how?Just codegen them as i16 in LLVM IR, and use a library function to convert the i16 into a 32-bit float doing the necessary unpacking. Similarly for store. -Chris -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090205/d756b658/attachment.html>