similar to: [PATCH 3/4] xen/arm: dump gic debug info from arch_dump_domain_info

Rename the existing gic_dump_info to gic_dump_info_guest reduce confusion. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> --- v2: s/gic_dump_info/gic_dump_info_guest/ --- xen/arch/arm/domain.c | 2 +- xen/arch/arm/gic.c | 77 ++++++++++++++++++++++++++++++++++++++++++++- xen/include/asm-arm/gic.h | 2 +- 3 files changed, 78 insertions(+), 3 deletions(-) diff

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

We need to write the irq number to GICC_DIR on the physical cpu that previously received the interrupt, but currently we are doing it on the pcpu that received the maintenance interrupt. As a consequence if a vcpu is migrated to a different pcpu, the irq is going to be EOI''ed on the wrong pcpu. This covers the case where dom0 vcpu0 is running on pcpu1 for example (you can test this

If the vgic needs to inject a virtual irq into the guest, but no free LR registers are available, add the irq to a list and return. Whenever an LR register becomes available we add the queued irq to it and remove it from the list. We use the gic lock to protect the list and the bitmask. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/gic.c |

# HG changeset patch # User yamahata@valinux.co.jp # Date 1188274001 -32400 # Node ID 2c9db26f1d0e0fdd4757d76a67f4b37ba0e40351 # Parent 58d131f1fb35977ff2d8682f553391c8a866d52c Make XEN_DOMCTL_destroydomain hypercall continuable. XEN_DOMCTL_destroydomain hypercall frees domain resources, especially it frees all pages of the domain. When domain memory is very large, it takes too long resulting in

During context switch is_running is set for the next vcpu before the gic state is actually saved. This leads to possible nasty races when interrupts need to be injected after is_running is set to the next vcpu but before the currently running gic state has been saved from the previous vcpu. Use current instead of is_running to check which one is the currently running vcpu: set_current is called

See: https://bugzilla.redhat.com/show_bug.cgi?id=1339977 --- src/launch-direct.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/launch-direct.c b/src/launch-direct.c index 20f6471..6450d7e 100644 --- a/src/launch-direct.c +++ b/src/launch-direct.c @@ -382,9 +382,12 @@ launch_direct (guestfs_h *g, void *datav, const char *arg) MACHINE_TYPE

We are currently initializing GIC irq properties (ITARGETSR, IPRIORITYR, and GICD_ICFGR) only in gic_route_irq, that is not called for guest interrupts at all. Move the initialization into a separate function (gic_set_irq_properties) and call it from gic_route_irq_to_guest. Changes in v2: - rebased on 77d3a1db3196b1b5864469f8d3f41d496800c795. Signed-off-by: Stefano Stabellini

In the GIC manual, the number of interrupt lines is computed with the following formula: 32(N + 1) where N is the value retrieved from GICD_TYPER. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/gic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 760c86b..389c217 100644 ---

Hi, This is the fifth version of this patch series. With the Versatile Express TC2, it''s possible to boot only with A7 or A15. If the user choose to boot with only A7, the CPU ID will start at 0x100. As Xen relies on it to set the logical ID and the GIC, it won''t be possible to use Xen with this use case. This patch series is divided in 3 parts: - Patch 1: prepare Xen

I''m afraid this series is rather a grab bag and it is distressingly large at this stage. With this series I can boot an Xgene board until it fails to find its SATA controller. This is a dom0 issue for which patches are pending from APM (/me nudges Anup). As well as the APM specific platform stuff there are also some generic improvements which were either necessary or useful during this

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

Hi all, this patch series makes the necessary changes to make sure that the current ARM hypercall ABI can be used as-is on 64 bit ARM platforms: - it defines xen_ulong_t as uint64_t on ARM; - it introduces a new macro to handle guest pointers, called XEN_GUEST_HANDLE_PARAM (that has size 4 bytes on aarch and is going to have size 8 bytes on aarch64); - it replaces all the occurrences of

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See