similar to: inviting an spa-x000

Displaying 20 results from an estimated 100 matches similar to: "inviting an spa-x000"

2008 Aug 25
1
Unicode notation \x000
Dear list, I am trying to replace Unicode notation of German and Spanish special characters (as read in by read.csv from excel spreadsheets) by character strings that can be interpreted by LaTeX. E.g.: uni2latex <- function(x){ x <- gsub("&", "et", x, fixed = TRUE) # Deutsch x <- gsub("\u0080", "\\\"A", x, fixed = TRUE) x
2005 Jul 26
2
sip+oh323 - no voice at sip side
Hello, I have something like this: SIPUSER <-sip-> ASTERISK <-oh323-> AUDIOCODEC <-e1-> PSTN After calling from SIP to PSTN (and from PSTN to SIP too) I can't hear anything only in my SIPUSER. At the PSTN side everything is OK. I have another network with another h323/sip (in the place of asterisk) and there everything is OK. In AUDIOCODES logs I see that everything goes
2004 Jun 17
4
7960 straight through?
if i go off hook and dial 666 from an internal sipura spa-x000 (at extn 141), it rings straight through to extn 666. using the same dialplan, from a cisco 7960 with 7.1 sip code (at extn 142), i have to go off hook hit NewCall punch 142 (or any valid extn in the dialplan) hit Dial then dial 666 wtf? sip.conf for crisco [fiji] callerid="crisco" <142>
2008 Apr 29
1
Annoying Sipura problem?
This may not be the right place to ask, but I have an annoying issue with a Sipura/SPA1000-2.0.10(e) ATA device connected to an Asterisk box. (The system is remote to me, so I've only been able to observe this by dialling into a VoIP phone on-site, then run commands on the box remotely!) First of all it's all working fine connected to an Asterisk box and the user can make/take calls
2005 May 23
3
ISPCON Mini-emergency: ATA186 Power Cube OK on SPA841?
Guess who's here to do an Asterisk demo this week without the power supply for his SPA-841. I have an ATA186 with me. Both phones use a 5v supply. Does anyone know whether the supplies are interchangeable? Thanks in advance; sorry for the noise. B.
2004 Jun 29
1
Asterisk and Sipura SPA-1000 configs
Anyone had any experience here on how to config both ends, asterisk and the sipura SPA1000 TIA
2004 May 19
1
avoiding rtp triangle
so, is it safe to put canreinvite=yes on a 7960? on a 1750? on a spa-x000? an xten? how the heck do i find out other than the hard way? randy -- ps: pun intended
2015 May 27
3
Concurrent scanning of same disk
Greetings, I am suffering of several weird errors which show randomly and make me suspect some concurrency issue. Libguestfs version is 1.28.1, linux kernel 3.16, libvirt 1.2.9 and qemu 2.1. What I'm trying to do is comparing the disk state at two different point of a guest execution. Disk snapshots are taken through libvirt in different moments (I am aware of caching issue), from such
2006 Jul 27
7
suspicious memory usages
Following is the output of top command at my server and i find the high usage very much alarming. We are basically a team of three developers working on same machine(remotely), so we run mongrel_rails servers from out ~/public/app directories. We also run a cluster of mongrel servers using apache2.2. Is this much memory use normal? PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+
2009 Feb 16
0
[LLVMdev] Modeling GPU vector registers, again (with my implementation)
Alex, From my experience in working with GPU vector registers; there is no support for swizzles in the manner that you would normally code them, and in my case I have 6^4 permutations on src registers and 24 combinations in the dst registers. The way that I ended up handling this was to have different register classes for 1, 2, 3 and 4 component vectors. This made the generic cases very simple
2008 Sep 26
0
[LLVMdev] Determining the register type of a MachineOperand
Yes, Another reason this is useful is for register-type specific representations of said register. For example, all my registers are 128bit vector registers, however, if I am only dealing with 32 bit vector registers, I can add write/read masks that tell the underlying hardware not to work on the whole register, but just a subset of the components. 32bit scalar mov: mov r1.x___, r0.x000 64bit
2009 Feb 16
2
[LLVMdev] Modeling GPU vector registers, again (with my implementation)
Evan Cheng-2 wrote: > > Well, how many possible permutations are there? Is it possible to > model each case as a separate physical register? > > Evan > I don't think so. There are 4x4x4x4 = 256 permutations. For example: * xyzw: default * zxyw * yyyy: splat Even if can model each of these 256 cases as a separate physical register, how can I model the use of r0.xyzw in
2015 May 28
3
Re: Concurrent scanning of same disk
2015-05-27 15:21 GMT+03:00 Richard W.M. Jones <rjones@redhat.com>: > On Wed, May 27, 2015 at 09:38:38AM +0300, NoxDaFox wrote: > > * RuntimeError: file receive cancelled by daemon - On r = > > libguestfsmod.checksums_out (self._o, csumtype, directory, sumsfile) > > * RuntimeError: hivex_close: do_hivex_close: you must call 'hivex-open' > > first to
2008 Sep 26
2
[LLVMdev] Determining the register type of a MachineOperand
On Wednesday 24 September 2008 15:23, Mon Ping Wang wrote: > To my knowledge, I don't think there is an easy way to get the MVT > information from a MachineOperand. Why do you need it for? In my See the thread I started on this very topic. Spilling is one place you'd like to have this information. > mind, the MachineInstr and its associated operands represent a >
2005 May 19
1
Newbie X100P question
Hello, I just bought a X100P from digitnetworks. It is supposed to be a FXO card, but there are 2 rj-11 plug on the card. One is labelled "phone" and the other "pstn". When i plug the "pstn" on the wall and the "phone" on my analog phone, everything (incoming and outgoing calls) works like before (without asterisk). AFAIU, i should have an FXS card in my
2009 May 08
0
[LLVMdev] Question on tablegen
Manjunath, I had a very similar problem and I solved it using a custom vector shuffle and addition instead of mov. For example, Vector_shuffle s1, s2, <0,3> is mapped to a custom instruction where I transform the swizzle to a 32bit integer mask and an inverted mask. So I have dst, src0, src1, imm1, imm2 And I have my asm look similar to: Add dst, src0.imm1, src1.imm2 and then in the asm
2004 Apr 06
2
Largescale Asterisk setup - 1000 external lines
Hi there Does anyone know if it is possible to install a largescale asterisk cluster with up to 1000 external lines. Redundancy and loadbalancing would surely be a must for a such system, but which other things should be considered? Best Regards Guenther Rust
2009 May 08
2
[LLVMdev] Question on tablegen
Dan, Thanks a lot. Using a modifier in the assembly string works for this case. I am trying to solve a related problem. I am trying to print out a set of "mov" ops for the vector_shuffle node. Since the source of the "mov" is from one of the sources to vector_shuffle, depending on the mask, I am not sure what assembly string to emit. For example, if I have d <-
2007 Aug 14
0
Maximum retries for seqno 102 when re-inviting.
We have an interesting issue: One of our providers has two softswitches. Calls coming from the first one are handled fine by asterisk, calls coming from the second one and going through the first one are euhm... dropped half a second into the RTP stream. I have opened a ticket at Digium for it: http://bugs.digium.com/view.php?id=10449 The output of "sip debug" is funny from line
2016 Mar 21
1
[PATCH v2 14/18] mm/balloon: use general movable page feature into balloon
Hi Minchan, [auto build test ERROR on next-20160318] [cannot apply to v4.5-rc7 v4.5-rc6 v4.5-rc5 v4.5] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url: https://github.com/0day-ci/linux/commits/Minchan-Kim/Support-non-lru-page-migration/20160321-143339 config: x86_64-randconfig-x000-201612 (attached as .config) reproduce: # save