search for: vid

Displaying 20 results from an estimated 608 matches for "vid".

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2018 Apr 19
3
[PATCH v2 net 2/3] virtio_net: fix adding vids on big-endian
Programming vids (adding or removing them) still passes guest-endian values in the DMA buffer. That's wrong if guest is big-endian and when virtio 1 is enabled. Note: this is on top of a previous patch: virtio_net: split out ctrl buffer Fixes: 9465a7a6f ("virtio_net: enable v1.0 support") Signed-o...
2018 Apr 19
3
[PATCH v2 net 2/3] virtio_net: fix adding vids on big-endian
Programming vids (adding or removing them) still passes guest-endian values in the DMA buffer. That's wrong if guest is big-endian and when virtio 1 is enabled. Note: this is on top of a previous patch: virtio_net: split out ctrl buffer Fixes: 9465a7a6f ("virtio_net: enable v1.0 support") Signed-o...
2013 Feb 13
14
[Bridge] [PATCH v10 net-next 00/12] VLAN filtering/VLAN aware bridge
Changes since v9: * series re-ordering so make functionality more distinct. Basic vlan filtering is patches 1-4. Support for PVID/untagged vlans is patches 5 and 6. VLAN support for FDB/MDB is patches 7-11. Patch 12 is still additional egress policy. * Slight simplification to code that extracts the VID from skb. Since we now depend on the vlan module, at the time of input skb_tci is guaranteed to be set if the pac...
2013 Jan 09
16
[Bridge] [PATCH net-next V5 00/14] Add basic VLAN support to bridges
This series of patches provides an ability to add VLANs to the bridge ports. This is similar to what can be found in most switches. The bridge port may have any number of VLANs added to it including vlan 0 priority tagged traffic. When vlans are added to the port, only traffic tagged with particular vlan will forwarded over...
2014 Nov 28
2
[PATCH 1/2] volt: allow non-bios voltage scaling
Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base.c index 32794a999106..26ccd8df193f 100644 --- a/nvkm/subdev/volt/base.c +++ b/nvkm/subdev/vo...
2014 Dec 01
2
[V3 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info
Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding at nvidia.com> --- v3: fix subject and typo, add reviewers' Acked-by v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1 + 1 file changed, 1 inse...
2014 Nov 28
0
[RESEND PATCH nouveau 2/3] volt: allow non-bios voltage scaling
Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Resend this patch with the fuse change and proper patch prefix per Thierry's request. nvkm/subdev/volt/base.c | 67 ++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 29 deletions(-) diff --git a/nvkm/subdev/volt/base.c b/nvkm/subdev/volt/base....
2014 Dec 02
3
[V3 PATCH 1/4] soc/tegra: fuse: export tegra_sku_info
Some Tegra drivers might be compiled as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> Acked-by: Alexandre Courbot <acourbot at nvidia.com> Acked-by: Thierry Reding <treding at nvidia.com> --- v3: fix subject and typo, add reviewers' Acked-by v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1 + 1 file changed, 1 inse...
2014 Nov 28
8
[RESEND V2 PATCH 1/3] soc/tegra: fuse: export tegra_sku_info for module use
Some Tegra drivers might be complied as kernel modules, and they need the fuse information for initialization. One example is the GK20A Nouveau driver. It needs the GPU speedo value to calculate frequency-voltage table. So export the tegra_sku_info. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- v2: add more description why we need this patch drivers/soc/tegra/fuse/fuse-tegra.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 11a5043959dc..011a3363c265 100644 --- a/drivers/soc/tegra/fuse/fus...
2017 Apr 22
3
[PATCH] volt: Improve min/max deteaction of range based volting
...29c7a 100644 --- a/drm/nouveau/nvkm/subdev/volt/base.c +++ b/drm/nouveau/nvkm/subdev/volt/base.c @@ -195,14 +195,16 @@ nvkm_volt_parse_bios(struct nvkm_bios *bios, struct nvkm_volt *volt) data = nvbios_volt_parse(bios, &ver, &hdr, &cnt, &len, &info); if (data && info.vidmask && info.base && info.step && info.ranged) { nvkm_debug(subdev, "found ranged based VIDs\n"); - volt->min_uv = info.min; - volt->max_uv = info.max; + volt->min_uv = 0xffffffff; + volt->max_uv = 0; for (i = 0; i < info.vidmask + 1; i++) {...
2008 Dec 04
2
ambiguous USB IDs (was: [nut-commits] svn commit r1589 - in trunk: . drivers)
On Wed, Dec 3, 2008 at 4:05 PM, Arjen de Korte <nut+devel at de-korte.org> wrote: > Citeren Charles Lepple <clepple at gmail.com>: > >> Note that this is the same VID/PID as on this example on the Lakeview >> Research home page: >> >> http://www.lvr.com/usb_on_a_budget.htm >> >> We can include the name "Lakeview Research" in the documentation, but >> we shouldn't lead people astray here. > > Another thing,...
2018 Apr 19
1
[PATCH v2 net 1/3] virtio_net: split out ctrl buffer
...irtio_net.c @@ -147,6 +147,17 @@ struct receive_queue { struct xdp_rxq_info xdp_rxq; }; +/* Control VQ buffers: protected by the rtnl lock */ +struct control_buf { + struct virtio_net_ctrl_hdr hdr; + virtio_net_ctrl_ack status; + struct virtio_net_ctrl_mq mq; + u8 promisc; + u8 allmulti; + u16 vid; + u64 offloads; +}; + struct virtnet_info { struct virtio_device *vdev; struct virtqueue *cvq; @@ -192,14 +203,7 @@ struct virtnet_info { struct hlist_node node; struct hlist_node node_dead; - /* Control VQ buffers: protected by the rtnl lock */ - struct virtio_net_ctrl_hdr ctrl_hdr; -...
2013 Jul 24
4
[PATCH 2/3] V5 qemu-xen-trad: Correctly expose PCH ISA bridge for IGD passthrough
...0 ++++++++++ hw/pci.h | 3 +++ hw/pt-graphics.c | 9 ++++++--- 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index f051de1..c423285 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -938,6 +938,16 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, return s->bus; } +PCIBus *pci_isa_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did, + uint8_t rid, pci_map_irq_fn map_irq, const char *name) +{ + PCIBus *s = pci_bridge_init(bus, devfn, vid, did, rid, map_irq, name); + + pci_co...
2016 Mar 21
0
[PATCH v2 16/22] volt: don't require perfect fit
...37 @@ static int nvkm_volt_set(struct nvkm_volt *volt, u32 uv) { struct nvkm_subdev *subdev = &volt->subdev; - int i, ret = -EINVAL; + int i, ret = -EINVAL, err, best = -1; if (volt->func->volt_set) return volt->func->volt_set(volt, uv); for (i = 0; i < volt->vid_nr; i++) { - if (volt->vid[i].uv == uv) { - ret = volt->func->vid_set(volt, volt->vid[i].vid); + if (i == 0) { + best = 0; + err = volt->vid[i].uv - uv; + } else { + int new_err = volt->vid[i].uv - uv; + if (abs(new_err) < abs(err) + || (err < 0 &&...
2024 Feb 20
1
NUT supports new VID/PID
Hello Jim, That?s a great help for me. You?re a so kind person ~ Our engineer download the branches f17d9f5 as below and repackage it for test. After testing, The Beta NUT works well with ST VID "0x0483", PID "0xA430. Please tell me how to speed up for merging this to formal version. May I have your predict schedule if possible? Thanks. GitHub - jimklimov/nut at f17d9f5428a9666090dc45ff7bae5862dd056986 <https://github.com/jimklimov/nut/tree/f17d9f5428a96...
2024 Feb 15
1
NUT supports new VID/PID
...: > Hello Jim, > > > > Thanks for your prompt reply and happy lunar new year. > > > > I think my situation is first one. Actually I am from CyberPower > UPS manufacture. In the past, CyberPower UPS works well with NUT. Today, I > want to use another VID/PID to fulfill ODM business rather than CyberPower > brand UPS. My engineer will apply standard USB power device description > like as CyberPower?s USB design. The only difference is VID/PID. What I > request is someone could help me finish following two items. > > 1. Offer the be...
2014 Nov 28
0
[PATCH 2/2] volt: add support for GK20A
The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Hi, The tegra_sku_info needs to be exported from Tegra fuse driver. I've sent the patch to the linux-tegra mailing list. Just FYI. Thanks, Vince drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 + nvkm/include/subde...
2014 Nov 28
0
[RESEND PATCH nouveau 3/3] volt: add support for GK20A
The voltage value are calculated by the hardware characterized result. Signed-off-by: Vince Hsu <vinceh at nvidia.com> --- Resend this patch with the fuse change and proper patch prefix per Thierry's request. drm/Kbuild | 1 + drm/core/subdev/volt/gk20a.c | 1 + nvkm/engine/device/nve0.c | 1 + nvkm/include/subdev/volt.h | 1 + nvkm/subdev/clock/gk20a.c | 15 ++++...
2023 Mar 27
1
[Bridge] [PATCH v2 net-next 2/6] net: dsa: propagate flags down towards drivers
...a behavior change here. Before: $ ip link add br0 type bridge && ip link set br0 up $ ip link set swp0 master br0 && ip link set swp0 up $ bridge fdb add dev swp0 00:01:02:03:04:05 master dynamic [ 70.010181] mscc_felix 0000:00:00.5: felix_fdb_add: port 0 addr 00:01:02:03:04:05 vid 0 [ 70.019105] mscc_felix 0000:00:00.5: felix_fdb_add: port 0 addr 00:01:02:03:04:05 vid 1 .... 5 minutes later [ 371.686935] mscc_felix 0000:00:00.5: felix_fdb_del: port 0 addr 00:01:02:03:04:05 vid 1 [ 371.695449] mscc_felix 0000:00:00.5: felix_fdb_del: port 0 addr 00:01:02:03:04:05 vid 0 $ b...
2008 Dec 04
1
ambiguous USB IDs
Citeren Charles Lepple <clepple at gmail.com>: >> Another thing, loosely related to this, is how we are going to deal with the >> 'generic' VID:PID combinations in some of the USB drivers, for example the >> megatec_usb and (new) blazer_usb drivers. At present, in the megatec_usb >> driver we have several VID:PID combinations for USB-to-serial converters >> that are commonly found in UPSes. But what happens if other total...