Displaying 6 results from an estimated 6 matches for "u205".
Did you mean:
205
2012 Jul 23
3
local APIC error 0x40
Running FreeBSD 8.3 -- and updating sources on a daily base and building everything -- I found a new APIC/ACPI problem introduced in the past week.
I have a Toshiba Satellite U205 with an Intel Core Duo (not a Core 2). It used to work fine with both cores but then sometime in on the road to BSD 8.0 the machine began hanging. So I added to /boot/loader.conf
hint.apic.0.disabled="1"
and the machine only had one core but it went back to being reliable.
The lapt...
2010 Dec 13
1
Looking for debugging ideas and help with testing
...testing/main/installer-amd64/current/images/hd-media/boot.img.gz
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=604560
Acer Aspire One 531h-0Bk
USB boot of http://people.debian.org/~joeyh/d-i/images/daily/hd-media/boot.img.gz
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=603960
Toshiba U205-S5057
CD boot of http://cdimage.debian.org/cdimage/squeeze_di_beta1/i386/iso-cd/debian-squeeze-di-beta1-i386-netinst.iso
(now available as beta2 only)
#604245, which is the only closely examined one, was crossposted here on
the Syslinux list as well. The submitter of the second didn't a...
2008 Mar 26
9
Getting started
Will someone please help me get past this error
Code:
libGL warning: 3D driver claims to not support visual 0x64
[/code]
2017 Nov 13
2
Reaching definitions on Machine IR post register allocation
...49,
> u51<R9B>(d11):u23, u52<ECX>(d4):]
>
> .
>
> .
>
> .
>
> s61: CMP32mr [d62<EFLAGS>!(d58,d80,u205):, u63<RDI>(+d194):u55,
> u64<RSI>(d57):, u65<ECX>(d50):]
>
> This is a test case I was interested in because it shows the partial
> register redefinition scenario in X86 for which more register units
> needed to be added. I have a hacky fix for this in TableGen...
2017 Nov 24
2
Reaching definitions on Machine IR post register allocation
...>>
>>> .
>>>
>>> .
>>>
>>> .
>>>
>>> s61: CMP32mr [d62<EFLAGS>!(d58,d80,u205):, u63<RDI>(+d194):u55,
>>> u64<RSI>(d57):, u65<ECX>(d50):]
>>>
>>> This is a test case I was interested in because it shows the partial
>>> register redefinition scenario in X86 for which more register units needed
>>> to be added. I h...
2017 Nov 01
2
Reaching definitions on Machine IR post register allocation
Hi Geoff/Krzyssztof,
Wouldn't the isRenamable() change be required even for the RDF based copy propagation? Maybe Hexagon does not impose ABI/ISA restrictions which require specific registers to be used in specific contexts.
Also, if Geoff's copy propagation pass is invoked post-RA wouldn't it need to handle the x86 ISA feature which allows 8 bit/16 bit values to be moved into a