search for: scavengeregister

On Mar 25, 2013, at 12:04 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > This patch adds parameter "EliminateFI" to RegScavenger::scavengeRegister, which tells register scavenger not to eliminate frame index of the emergency spill slot if set to false. > > I have pseudo load, store and copy instructions which are generated during register allocation and expanded post-RA but before the final stack size is known. I use register scavenger...

This patch adds parameter "EliminateFI" to RegScavenger::scavengeRegister, which tells register scavenger not to eliminate frame index of the emergency spill slot if set to false. I have pseudo load, store and copy instructions which are generated during register allocation and expanded post-RA but before the final stack size is known. I use register scavenger to search...

...Jakob, I believe Hal is trying to enable register scavenger to find two (or more) registers that can be used as temporaries. One problem I see with this approach is that, if you use register scavenger during PEI, you will have to pessimistically set aside two emergency spill slots before you call scavengeRegister, even if it turns out you only need one. Having an extra stack slot might not be a big problem, but still it is nice if we can avoid allocating a slot unnecessarily. I probably won't need these pseudo instructions that are expanded post-RA in the first place if I can tell the register allocato...

...: "Akira Hatanaka" <ahatanak at gmail.com> >> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Hal Finkel" <hfinkel at anl.gov> >> Sent: Tuesday, March 26, 2013 12:40:44 PM >> Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister >> >> >> On Mar 26, 2013, at 10:29 AM, Akira Hatanaka <ahatanak at gmail.com> >> wrote: >> >>> The size of general purpose integer registers for mips32 is 32-bit >>> and accumulators are 64-bit registers consisting of 32-bit hi/lo >>&gt...

...ka" <ahatanak at gmail.com> > >> Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Hal Finkel" > <hfinkel at anl.gov> > >> Sent: Tuesday, March 26, 2013 12:40:44 PM > >> Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister > >> > >> > >> On Mar 26, 2013, at 10:29 AM, Akira Hatanaka <ahatanak at gmail.com> > >> wrote: > >> > >>> The size of general purpose integer registers for mips32 is 32-bit > >>> and accumulators are 64-bit registers consis...

...> > To: "Akira Hatanaka" <ahatanak at gmail.com> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Hal Finkel" <hfinkel at anl.gov> > Sent: Tuesday, March 26, 2013 12:40:44 PM > Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister > > > On Mar 26, 2013, at 10:29 AM, Akira Hatanaka <ahatanak at gmail.com> > wrote: > > > The size of general purpose integer registers for mips32 is 32-bit > > and accumulators are 64-bit registers consisting of 32-bit hi/lo > > register pairs. So you will...

On Mar 26, 2013, at 10:29 AM, Akira Hatanaka <ahatanak at gmail.com> wrote: > The size of general purpose integer registers for mips32 is 32-bit and accumulators are 64-bit registers consisting of 32-bit hi/lo register pairs. So you will need two instructions to copy two 32-bit GPR registers to a 64-bit accumulator register. If spilling to multiple registers is unsupported, perhaps I can

...> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "LLVM Developers Mailing List" <llvmdev at cs.uiuc.edu>, "Akira Hatanaka" <ahatanak at gmail.com> > Sent: Saturday, April 6, 2013 11:56:28 AM > Subject: Re: [LLVMdev] [PATCH] RegScavenger::scavengeRegister > > > On Apr 6, 2013, at 12:42 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > > ----- Original Message ----- > >> From: "Jakob Stoklund Olesen" <stoklund at 2pi.dk> > >> To: "Akira Hatanaka" <ahatanak at gmail.com> > &g...

...believe Hal is trying to enable register scavenger to find two (or more) registers that can be used as temporaries. > > One problem I see with this approach is that, if you use register scavenger during PEI, you will have to pessimistically set aside two emergency spill slots before you call scavengeRegister, even if it turns out you only need one. Having an extra stack slot might not be a big problem, but still it is nice if we can avoid allocating a slot unnecessarily. > > I probably won't need these pseudo instructions that are expanded post-RA in the first place if I can tell the registe...

On Mar 25, 2013, at 2:51 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > Yes, it sounds like it will solve the problem. > > Using the following example where live ranges of accumulators $vreg_acc0 and $vreg_acc1 conflict, > > MULT $vreg_acc0, $vreg_gpr0, $vreg_gpr1 > MULT $vreg_acc1, $vreg_gpr2, $vreg_gpr3 > > (consumer of $vreg_acc1) > (consumer of

On Mon, Mar 25, 2013 at 4:02 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk>wrote: > > On Mar 25, 2013, at 2:51 PM, Akira Hatanaka <ahatanak at gmail.com> wrote: > > > Yes, it sounds like it will solve the problem. > > > > Using the following example where live ranges of accumulators $vreg_acc0 > and $vreg_acc1 conflict, > > > > MULT

...enable register scavenger to find two (or > more) registers that can be used as temporaries. > > > > One problem I see with this approach is that, if you use register > scavenger during PEI, you will have to pessimistically set aside two > emergency spill slots before you call scavengeRegister, even if it turns > out you only need one. Having an extra stack slot might not be a big > problem, but still it is nice if we can avoid allocating a slot > unnecessarily. > > > > I probably won't need these pseudo instructions that are expanded > post-RA in the first pl...

Hello all, For my custom processor backend I am trying add some instruction using BuildMI() inside eliminateFrameIndex(). I tried RegScavenger like this: unsigned RegUnused0 = RS->FindUnusedReg(&LASER::GNPRegsRegClass); if (!RegUnused0) RegUnused0 = RS->scavengeRegister(&LASER::GNPRegsRegClass, II, SPAdj); assert(RegUnused0 && "Register scavenger failed"); RS->setRegUsed(RegUnused0); It works but there are two issues: 1) I need to registers and RegScavenger only returns one. 2) I cannot unset the used register and I get spill slot error...

...1. The code thus never entered the if (BigStack && !ExtraCSSpill) block further down where setScavengingFrameIndex should have been set. As a result of it was not being set there, there was an assertion failure (ScavengingFrameIndex >= 0) and subsequent memory corruption in RegScavenger::scavengeRegister. I fixed this by performing the CanEliminateFrame and RegInfo->cannotEliminateFrame checks before the call to estimateRSSStackSizeLimit, since these values are available before BigStack is initialized. Does that sound reasonable? I've attached a patch with my change. Oh, I should mention t...

...;) in libLLVMCodeGen.a(LiveIntervalAnalysis.cpp.o) llvm::VirtRegMap::FindUnusedRegisters(llvm::LiveIntervals*) in libLLVMCodeGen.a(VirtRegMap.cpp.o) llvm::VirtRegMap::runOnMachineFunction(llvm::MachineFunction&) in libLLVMCodeGen.a(VirtRegMap.cpp.o) llvm::RegScavenger::scavengeRegister(llvm::TargetRegisterClass const*, llvm::ilist_iterator<llvm::MachineInstr>, int)in libLLVMCodeGen.a(RegisterScavenging.cpp.o) (anonymous namespace)::RAFast::runOnMachineFunction(llvm::MachineFunction&) in libLLVMCodeGen.a(RegAllocFast.cpp.o) (anonymous namespace)::RAL...