search for: demarshall

A controller I''m trying to test simply delivers a text string to the client, which then demarshalls it to retrieve some objects. I want to test that the returned string is correct. I don''t want to compare the string character-by-character with response.has_text because that ties me to the implementation of the Marshall class. Instead, I just want to demarshall the string and co...

...e platforms but x86_64 would be OK for now). I know that LLVM doesn't handle this completely automatically (e.g. the type {i32,i32} should be passed as a single i64 on x86_64 linux). Is there any library that automates the generation of function declarations meeting the ABI and emit marshalling/demarshalling code from LLVM's types? I would imagine that Clang needs to do this internally, where does this code live? Thanks for your help! Zach

When calling xen_vbd_set_mode(), libxenapi attempted to convert the enum mode parameter to a string twice - resulting in segfault. Removed first conversion since conversion is taking place in marshalling/demarshalling layer. Fixed similar double enum conversion in other places as well. Regards, Jim _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

I realize this subject is redundant for this community, but I''m hoping the Rails community can provide me with some additional ammunition to help push a rails project I''m pitching over the proverbial tipping point at my company. The Situation: I''m the lead architect at a large bay area retailer. My team and I are currently suffering through the process of paying

...b/Target/AMDGPU/SIISelLowering.cpp > @@ -263,6 +263,12 @@ SITargetLowering::SITargetLowering(TargetMachine &TM, > setOperationAction(ISD::FDIV, MVT::f32, Custom); > setOperationAction(ISD::FDIV, MVT::f64, Custom); > > + // GCN CMP_SWAP needs input marshalling, and output demarshalling > + setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Custom); > + // We can't return success/failure, only the old value, > + // let LLVM add the comparison > + setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, MVT::i32, Expand); > + > setTargetDAGCombine(ISD::...

Hi Tom, Matt, I'm working on a project that needs few coherent atomic operations (HSA mode: load, store, compare-and-swap) for std::atomic_uint in HCC. the attached patch implements atomic compare and swap for SI+ (untested). I tried to stay within what was available, but there are few issues that I was unsure how to address: 1.) it currently uses v2i32 for both input and output. This