Displaying 13 results from an estimated 13 matches for "checktype".
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check_type
2011 Apr 06
5
Blank lines in conditional templates
...l_server| -%>
real=<%= real_server %>:<%= port %> gate
<% end -%><% else -%><% real_servers.zip(weights).each do |
real_server, weight| -%>
real=<%= real_server %>:<%= port %> gate <%= weight %>
<% end -%><% end -%>
<% if not checktype.empty? then -%> checktype=<%= checktype -%><%
end -%>
<% if not service.empty? then -%> service=<%= service %><% end -
%>
<% if not checkcommand.empty? then -%> checkcommand=<%=
checkcommand %><% end -%>
protocol=<%= protocol %>...
2011 Feb 24
2
[LLVMdev] Get Element Ptr inst
...n I replace the 2nd one with
%tmp126 = getelementptr inbounds %struct.termbox* %termptr.1, i32 0, i32 5,
i64 0, i64 0 ; <i16*>
When I try to create this instruction i get the follwoing error,
opt: /home/vadve/aggarwa4/llvm27/llvm-2.7/include/llvm/Instructions.h:276:
const llvm::Type* llvm::checkType(const llvm::Type*): Assertion `Ty &&
"Invalid GetElementPtrInst indices for type!"' failed.
Thanks!
Arushi
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2010 Mar 03
1
[LLVMdev] Problem with ALWAYS_INLINE
...ionDAGISel.cpp: In function `bool CheckChildType(const unsigned char*, unsigned int&, llvm::SDValue, const llvm::TargetLowering&, unsigned int)':
/arm/scratch/egrimley/llvm.svn/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1880: sorry, unimplemented: inlining failed in call to 'bool CheckType(const unsigned char*, unsigned int&, llvm::SDValue, const llvm::TargetLowering&)': function body not available
/arm/scratch/egrimley/llvm.svn/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:1894: sorry, unimplemented: called from here
make[3]: ***
[/arm/scratch/egrimley/llvm-svn-obj/lib/C...
2011 Feb 24
0
[LLVMdev] Get Element Ptr inst
...ndex because the result of indexing i32 0 and i32 5 is a [2 x i16] and
not a [2 x i16] *.
-- John T.
>
> When I try to create this instruction i get the follwoing error,
>
> opt:
> /home/vadve/aggarwa4/llvm27/llvm-2.7/include/llvm/Instructions.h:276:
> const llvm::Type* llvm::checkType(const llvm::Type*): Assertion `Ty &&
> "Invalid GetElementPtrInst indices for type!"' failed.
>
> Thanks!
> Arushi
>
>
>
>
>
>
>
2011 Feb 24
1
[LLVMdev] Get Element Ptr inst
...xing i32 0 and i32 5 is a [2 x i16] and not a [2 x
> i16] *.
>
> -- John T.
>
>
>
>> When I try to create this instruction i get the follwoing error,
>>
>> opt: /home/vadve/aggarwa4/llvm27/llvm-2.7/include/llvm/Instructions.h:276:
>> const llvm::Type* llvm::checkType(const llvm::Type*): Assertion `Ty &&
>> "Invalid GetElementPtrInst indices for type!"' failed.
>>
>> Thanks!
>> Arushi
>>
>>
>>
>>
>>
>>
>>
>>
>
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2008 Jan 09
7
An "R is slow"-article
Hi all,
Reading the wikipedia page on R, I stumbled across the following:
http://fluff.info/blog/arch/00000172.htm
It does seem interesting that the C execution is that much slower from
R than from a native C program. Could any of the more technically
knowledgeable people explain why this is so?
The author also have some thought-provoking opinions on R being
no-good and that you should write
2005 Jun 04
1
[LLVMdev] "Value in symtab but has no slot number!!"
...lt;%binary_tree__0**> [#uses=8]
...
%Load_New__00 = load %binary_tree__0** %New__0 ; <%binary_tree__0*> [#uses=0]
...
%gep.1 = getelementptr %binary_tree__0* %Load_New__001, int 0, uint 0 ; ...
------------------------------------
Gives the error:
---------------
const llvm::Type* checkType(const llvm::Type*): Assertion `Ty && "Invalid indices for type!"'
---------------
However if I replace the last line for this:
---------------
%gep.1 = getelementptr %binary_tree__0* %Load_New__001, int 0, uint 1 ; ...
---------------
Where the second index is 1 or 2, it w...
2008 Aug 21
1
ultramonkey and asterisk
...orial:
http://blog.iclutton.com/2008/01/load-balancing-and-high-availablity.html
i have this on my ldirectord.cf:
virtual=123.45.67.155:5060
real=123.45.67.130:5060 gate
real=123.45.67.131:5060 gate
service=sip
scheduler=rr
protocol=udp
checktype=negotiate
persistent=1
i was able to make my http and https to work but not sip.
hope someon could help me. thanks
regards,
nhadie
2007 Aug 17
1
[LLVMdev] Inserting trace information during opt transformations
...as follows:
opt -load ~/llvm-tools/mcp-build/Debug/lib/MCPTransforms.so -trace-instructions -lowerselect -lowerallocs -lowergc -lowerinvoke -lowerswitch -reg2mem -insertyieldpoints -trace-memory -o Abort.fbc Abort.bc
opt: /usr/local/rse/llvm/src/lib/VMCore/Instructions.cpp:872: const llvm::Type* checkType(const llvm::Type*): Assertion `Ty && "Invalid GetElementPtrInst indices for type!"' failed.
opt((anonymous namespace)::PrintStackTrace()+0x15)[0x8346cf5]
/lib/tls/libc.so.6(abort+0xe9)[0xbd3209]
/lib/tls/libc.so.6(__assert_fail+0x101)[0xbcad91]
opt[0x82ec15e]
make: *** [Abort....
2005 Jun 04
0
[LLVMdev] "Value in symtab but has no slot number!!"
Hi Ricardo,
Yes, its because you have an invalid module. You should run
Module::verify before attempting to write the bytecode. This will
pinpoint the problem for you. However, I think I know what's going on:
you've left an object (a Value not a Type) in the symbol table that is
not in the Module. Not quite sure how you do that, but I suppose its
possible if you manipulated the symbol
2005 Jun 04
3
[LLVMdev] "Value in symtab but has no slot number!!"
Hello,
I am receiving this error:
assert(Slot != -1 && "Value in symtab but has no slot number!!");
While trying to generate a module at run time using LLVM classes. Specifically with an instance of
StoreInst class. After I generate all the instructions, I try to save the Module to bytecode, but
I receive that error in the method 'outputSymbolTable'
Does anyone
2012 Mar 14
0
[LLVMdev] Data/Address registers
...ng the following isel opcodes:
>
> /*3244*/ /*Scope*/ 20, /*->3265*/
> /*3245*/ OPC_RecordChild1, // #1 = $b
> /*3246*/ OPC_MoveChild, 1,
> /*3248*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
> /*3251*/ OPC_MoveParent,
> /*3252*/ OPC_CheckType, MVT::i16,
> /*3254*/ OPC_EmitConvertToTarget, 1,
> /*3256*/ OPC_MorphNodeTo, TARGET_VAL(ME::AADDMri), 0,
>
> and in the same logic chain of pattern checking, DADDri comes right after AADDMri (with Scope changes in the middle)
>
> /*3285*/ OPC_RecordChild0, //...
2012 Mar 14
2
[LLVMdev] Data/Address registers
...se two
patterns, tblgen is producing the following isel opcodes:
/*3244*/ /*Scope*/ 20, /*->3265*/
/*3245*/ OPC_RecordChild1, // #1 = $b
/*3246*/ OPC_MoveChild, 1,
/*3248*/ OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
/*3251*/ OPC_MoveParent,
/*3252*/ OPC_CheckType, MVT::i16,
/*3254*/ OPC_EmitConvertToTarget, 1,
/*3256*/ OPC_MorphNodeTo, TARGET_VAL(ME::AADDMri), 0,
and in the same logic chain of pattern checking, DADDri comes right
after AADDMri (with Scope changes in the middle)
/*3285*/ OPC_RecordChild0, // #0 = $a
/*3286*/ OPC_Re...