search for: assembly

...nt messages I'm getting are: Code: err:msi:MsiEnableLogW Unable to enable log L"" fixme:msi:msi_unimplemented_action_stub MigrateFeatureStates -> 24 ignored L"Upgrade" table values fixme:msi:msi_unimplemented_action_stub MsiUnpublishAssemblies -> 10 ignored L"MsiAssembly" table values err:msi:ITERATE_Actions Execution halted, action L"InstallFinalize" returned 1603 err:msi:MsiEnableLogW Unable to enable log L"" and Code: fixme:msi:msi_unimplemented_action_stub MigrateFeatureStates -> 1 ignored L"Upgrade" table values fixme...

Chris Lattner wrote: > On Mon, 1 May 2006, Jeff Cohen wrote: >> Chris Lattner wrote: >>> On Mon, 1 May 2006, Ralph Corderoy wrote: >>>> NASM might be the nicer target since it's GNU LGPL and runs on >>>> multiple >>>> OS. Its home page is broken at the moment, but the manual pages work. >>>> >>>>

Chris Lattner wrote: > On Mon, 1 May 2006, Ralph Corderoy wrote: > >> >> NASM might be the nicer target since it's GNU LGPL and runs on multiple >> OS. Its home page is broken at the moment, but the manual pages work. >> >> http://nasm.sourceforge.net/doc/html/nasmdoc0.html > > That's fine with me. The instructions are in true intel mode now,

...y useful way.  As a couple of examples, is the fault behavior of an instruction well defined?  Is the label near an instruction used by the signal handler?  Is that data byte just before an instruction actually decoded as part of the instruction? The benefit of the later option is that existing assembly files can be used without modification.  This is a huge advantage in terms of ease of mitigation for existing code bases.  It's also the approach the original patch sets for GCC took. In the original review thread(s), I had taken the position that we should reject the automagic assembler b...

...m is that gas is bare-bones and > masm is featureful. Clearly that doesn't hold for what LLVM needs, > and > you imply it's true for the whole family of assemblers that use Intel > syntax. Very surprising to those of us (well, me anyway) with minimal > time writing actual assembly. The long term plans are to finish the integrated assembler. We currently have active work to finish the assembler for Macho X86 32/64 targets. I suspect that ELF will follow shortly after that, though I don't know who exactly will do the work. Adding PECOFF support should not be th...

Short version: If the integrated assembler accepted assembly strings as input, more targets could take advantage of integrated assembly. The longer version: For a given assembly statement, my out-of-tree target has complex instruction selection logic -- more so than the in-tree targets. This target uses variable length instructions and a laborious hierarc...

> > The more important question is: why would you want to do that? What > problem are you trying to solve? As weird as it sounds, I'm looking for multiplatform assembly languages. I want to learn assembly, but I want my knowledge and code to carry over no matter which operating system I'm using. I regularly use Windows, Mac, and Linux, and I don't want to have to rewrite my codebase every time I boot into another operating system. I can do this by writing...

GCC-style inline assembly is notoriously hard to write correctly, because it is the user's responsibility to tell the compiler about the requirements of the assembly (inputs, output, modified registers, memory access), and getting this wrong results in silently generating incorrect code. This is also dependent on regist...

Dear llvm developers, I am trying to run clang assembler to use avx instructions on Mac. I use gcc 4.7.1 to generate .s files from .c files. I can assemble foo.s by clang -c -x assembler foo.s to get foo.o but clang -c -x assembler foo_long.s fails with $clang -x assembler foo_long.s foo_long.s:27:2: error: invalid instruction mnemonic 'vcvttsd2siq' vcvttsd2siq %xmm0,

...d, but the common wisdom is that gas is bare-bones and masm is featureful. Clearly that doesn't hold for what LLVM needs, and you imply it's true for the whole family of assemblers that use Intel syntax. Very surprising to those of us (well, me anyway) with minimal time writing actual assembly. Is any of this documented somewhere I can just go off and read, or is it just lore in the LLVM community? Dustin

On Mon, 1 May 2006, Jeff Cohen wrote: > Chris Lattner wrote: >> On Mon, 1 May 2006, Ralph Corderoy wrote: >>> NASM might be the nicer target since it's GNU LGPL and runs on multiple >>> OS. Its home page is broken at the moment, but the manual pages work. >>> >>> http://nasm.sourceforge.net/doc/html/nasmdoc0.html >> >> That's

Has anyone converted llvm/projects/test-suite to use the llvm assembler instead of gcc? If so, what was needed to change and how? My assumption is that this would be a good way to test the llvm assembler. Jack -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20121015/a91a495f/attachment.html>

Hi all, I am using the inline assembly expressions( which are different from Module Level Inline Assembly) and have some doubts about how do the assembly expressions affect the optimization passes. I inserted an inline assembly for a particular instruction and I assume that this instruction affects the Data Flow. Thus I want to make su...

I have one thing not clear to me. If the llvm diect generate object code. Then how about the llvm assembler processing llvm code with inline assembly? Indeed, it's seems now llvm is direct using gas syntax in the assembly code. And because it's generate .S files, so it can be manipulated by binutils. But there is one day, no binutils any further, how to deal with these inline assembly. Generally, there is two major inline assembly at all...

Let me see if I understand the response ;-) When you are saying integrated assembler do you mean llc --filetype=obj? If so, we currently have that for an option when running the test-suite. When you say that to test the llvm-mc assembler for your target you don't substitute the gcc assembler invocation for llvm-mc which would expect the resultant executable run to pass. Instead you have to

Hi -- I'm still very much a newbie with llvm, but am looking (hopefully) to use it to compile into native intel code a set of source that is a combination of byte codes for my own custom vm and intel code that has been coded in assembly language directly. In an earlier exchange, I already discovered that llvm does not do any optimizations on intel assembly language code. This would be an interesting thing to add, I believe, and I may make some progress in that direction as I proceed. But in the meantime I'm wondering if the...

TL;DR: If I'm trying to define new assembler directive syntax to support DWARF v5, it seems like a good idea for all the various assemblers out there in the world to support the same syntax. How would I go about negotiating that syntax with other assembler providers? Is GNU as the only really relevant one? Long version: DWARF v5 introduces a couple of new features in the .debug_line section

...rantl at apple.com> +Jonas Devlieghere<mailto:jdevlieghere at apple.com> (seems Jonas is doing a bunch of debug info work - guessing he's working with you, Adrian?) I'm guessing Eric's the most likely to have contacts over in GCC land to maybe bridge the gap when talking about assembly syntax across the two. Eric - any ideas how best to negotiate this pseudo-standard? (there's another feature or two I'd like to propose too - at least to standardize what the syntax /should/ be, even if gas doesn't support it immediately) Paul - perhaps a brief description of the propo...

Thank you for reminding me the notion of the basic block. Of course, I know all the assembly takes the form of BBs and is divided into units of BB. OK. It looks better for me to explain what I wanted to do more clear from the first. Actually, I am working on emitting out an assembly of VM by using LLVM. LLVM assembly looks similar with this VM assembly except BB. The VM assembly does not...

Hi All, I have a question about relaxation stuff in MC assembler. I am encoding conditional branch instructions with PC relative address in assembler. I have met some tests with relative offsets over the instruction's address field. I think I need to change the conditional instruction to multiple instructions with basic blocks for else and then syntax and it should be done in assembler