search for: 6a6b1ad4

Displaying 3 results from an estimated 3 matches for "6a6b1ad4".

2013 Jun 13
0
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
Hi, I have the following test case: define void @foo(<2 x float>* noalias nocapture %out, <2 x float>* noalias nocapture %data0) nounwind { entry: %val1 = load <2 x float>* %data0, align 8 store <2 x float> %val1, <2 x float>* %out, align 8 fence acq_rel %val2 = load <2 x float>* %data0, align 8 store <2 x float> %val2, <2 x float>*
2013 Jun 13
2
[LLVMdev] A question w.r.t fence instruction vs. noalias pointer
...analysis for fences; see http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/AliasAnalysis.h?revision=182755&view=markup#l431. -Eli -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20130612/6a6b1ad4/attachment.html>
2013 Jun 09
2
[LLVMdev] [cfe-dev] Meaning of LLVM optimization levels
On 7 June 2013 17:52, Dallman, John <john.dallman at siemens.com> wrote: > Is it possible for the debug information to mark all the instructions that arise > from a > language statement as coming from that statement, even though the instructions may > be widely scattered? Yes. > Instructions whose effects > are used in the logic from more than one statement would have to