search for: 125k

...2EB2FE7F11258E27AF21BF60D2F4B06B for a depth of 1 the file will be in: 2/2EB2FE7F11258E27AF21BF60D2F4B06B etc... My question (finally): how to optimize rsync's speed? - how deep should the directory structure be? What would be faster to rsync - 1 directory with 2M files, or 16 directories with 125K files each, or 256 directories with 8K files each, .... Shai -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.samba.org/pipermail/rsync/attachments/20100703/f501eacd/attachment.html>

...here is a lot of data (8 TB mp3 files). Some directories contains more then 250.000 files. The application is a music playbox in a huge CD shop: you can take a CD hold it under the scanner and after the barcode is scanned it starts playing the first CD track (for 30 seconds). All files are exactly 125K in size. The overall samba performance is very good, but if the source directory contains more then 150.000 files, performances decreases. Windows application on the client side asks for all file matching the pattern 1234ABCD.m* the result is 6-20 Tracks per CD. Using old NT-Server the performanc...

...boxes are all greyed out. Further, do I need tun/tap to host VMs that themselves support virtual ips? The module for tun I found as part of the base install. But I cannot locate the module for ethertap and yum does not tell me where it is found. Lastly, why is qemu 4.5M but kvm-qemu-img is only 125K? Regards, -- *** E-Mail is NOT a SECURE channel *** James B. Byrne mailto:ByrneJB at Harte-Lyne.ca Harte & Lyne Limited http://www.harte-lyne.ca 9 Brockley Drive vox: +1 905 561 1241 Hamilton, Ontario fax: +1 905 561 0757 Can...

...oftware. X.25 software, Version 3.0.0. SuperLAT software (copyright 1990 by Meridian Technology Corp). Primary Rate ISDN software, Version 1.1. 2 FastEthernet/IEEE 802.3 interface(s) 24 Serial network interface(s) 1 Channelized T1/PRI port(s) DRAM configuration is 64 bits wide with parity disabled. 125K bytes of non-volatile configuration memory. 32768K bytes of processor board System flash (Read/Write)

...ally simple (the only FSF Hardware-Endorsed laptop product is that Loongson Leemote, by virtue of it having a 2D PCI Graphics IC and a 900mhz MIPS). the logic goes as follows: * one of the Gallium3D targets is LLVM. * one of LLVM's targets is Xilinx FPGAs (MicroBlaze). * the zynq-7000 7030 has 125k FPGA Logic Gates (and more) * with a TFP410 as the DVI driver, the OGP is done! now, given that this appears to be "too easy", i'd really _really_ appreciate some help checking the facts. and, also, if it turns out to be feasible, assessing roughly what the performance might be. al...

Some more information... No traffic must be on 64.254.229.230 , all must be on 64.254.229.226,64.254.229.227 and 64.254.229.229, but almost all the traffic is on 64.254.229.230. this is the trouble Incoming 64.254.229.226 : 125K Incoming 64.254.229.227 : 257K Incoming 64.254.229.228 : 111K Incoming 64.254.229.229 : 312K Incoming 64.254.229.230 : 13545K Incoming Total eth0...

...Class B: rate 0.25 * (current rate of class A), ceil 1000 kbit > You can only do this with external scripting. There are two possible interpretations for the term "current rate". If you mean the one declared, then I think Stef is correct. That is, you can declare class B to have rate 125k which is .25 that of class A, but if you then change class A to 1000, class B is still 125, no longer .25 class A. However, you more likely mean that the bandwidth actually used for class B at any time should be .25 that of class A. And this is the default behavior if you just declare the class B...

...ot;eth1 recv and send" are both very high! while eth0 and eth2 have low I/O. # dstat -N eth0,eth3,eth4 2 ----total-cpu-usage---- -dsk/total- --net/eth0----net/eth1----net/eth2-> usr sys idl wai hiq siq|_read _writ|_recv _send:_recv _send:_recv _send> 0 25 72 3 1 0| 38k 192k| 125k 119k: 949B 268B: 584B 37k> 1 21 76 1 1 0| 0 446k| 191k 160k: 18M 339k: 843B 506k> 1 22 75 2 1 0| 40k 524k| 250k 183k: 69M 694k:1066B 490k> 1 35 61 1 1 0| 0 51M| 158B 123B: 72M 135k: 611B 467k> 1 33 61 5 1 0| 94k 52M|...

...-Endorsed > laptop product is that Loongson Leemote, by virtue of it having a 2D > PCI Graphics IC and a 900mhz MIPS). > > the logic goes as follows: > * one of the Gallium3D targets is LLVM. > * one of LLVM's targets is Xilinx FPGAs (MicroBlaze). > * the zynq-7000 7030 has 125k FPGA Logic Gates (and more) > * with a TFP410 as the DVI driver, the OGP is done! > > now, given that this appears to be "too easy", i'd really _really_ > appreciate some help checking the facts. and, also, if it turns out > to be feasible, assessing roughly what the p...

...lines of td files. > You can't measure the difference in performance if you eliminate > dynamic_cast and exceptions. This isn't about performance. It's about bringing it up to snuff with the rest of the codebase. And btw it's not "a few thousand lines", it's >125K lines. It's also not "a small tool"; it's a critical piece of infrastructure for the project and the current state of affairs poses a bottleneck for certain kinds of improvements in relevant areas (like, say, *all* the targets). > We seem to make a lot of decisions for the sak...

Why do you want to eliminate dynamic_cast and exceptions from tablegen? This is just a tool run over a few thousand lines of td files. You can't measure the difference in performance if you eliminate dynamic_cast and exceptions. I think it was a huge mistake to not use RTTI and exceptions in the compiler itself but I'm sure that old horse has been beaten to death long ago. But for

Sorry for the frantic nature of this message, but we need to allow pings on our firewall so our ISP can test things. I''ve done this, and it still doesn''t work: (I am now at v.2.0.10) rules: AllowPing net fw AllowPing sls fw show indicates some matches, so where are they? Chain AllowPing (4 references) pkts bytes target prot opt in out source

I have Solaris 10 U7 that is exporting ZFS filesytem. The client is Solaris 9 U7. I can mount the filesytem just fine but I am unable to write to it. showmount -e shows my mount is set for everyone. the dfstab file has option rw set. So what gives? Phillip -- This message posted from opensolaris.org

...x -o bsd ${SYSTEM_OBJ} vers.o text data bss dec hex 7235924 179256 1053092 8468272 813730 18m4.05s real 16m35.42s user 1m35.06s system -rw-r--r-- 1 jsg wsrc 118K Jul 18 01:12 if_spppsubr.o -rw-r--r-- 1 jsg wsrc 124K Jul 18 01:16 pci_subr.o -rw-r--r-- 1 jsg wsrc 125K Jul 18 01:07 aic79xx.o -rw-r--r-- 1 jsg wsrc 159K Jul 18 01:09 bwi.o -rw-r--r-- 1 jsg wsrc 349K Jul 18 01:17 isp_pci.o -rwxr-xr-x 1 jsg wsrc 7.8M Jul 18 01:24 bsd

...(revision 0x00) with 126976K/4096K bytes of memory. Processor board ID 09301319 R4700 CPU at 100Mhz, Implementation 33, Rev 1.0 X.25 software, Version 3.0.0. Bridging software. 1 FastEthernet/IEEE 802.3 interface(s) 2 Voice FXO interface(s) DRAM configuration is 64 bits wide with parity disabled. 125K bytes of non-volatile configuration memory. 8192K bytes of processor board System flash (Read/Write) 16384K bytes of processor board PCMCIA Slot0 flash (Read/Write) %Error: No PCMCIA Slot1 flash chip information available Configuration register is 0x2102 If anyone has any suggestions at all, th...

Hi, I have a install of shorewall I have 2 interfaces(I think) ppp0[connection device] and eth0 [LAN device], I want to allow all traffic from the the internet in or aleast port 80 and CVS and webmin and mail and everything normal to the main machine with shorewall on it. I changed to policy file but it just gave me errors as to double interfaces. I also what still to alow connection sharing

Hi all, I'm sure that the last thing that you want to think about is TableGen's guts, but I'm pursuing a course in bringing TableGen up to snuff with the rest of LLVM. Basically, I would like to introduce a "TGContext" class (by analogy with LLVMContext) to harbor a proper unique'd type system and BumpPtr allocate all of TableGen's data (RecTy's, Record's,

Looking at the existing flow of passes for LTO, it appears that most all passes are run on a per file basis, before the call to the gold linker. I'm looking to get people's feedback on whether there would be an advantage to waiting to run a number of these passes until the linking stage. For example, I believe I saw a post a little while back about postponing vectorization until the

<copied from opensolaris-dicuss as this probably belongs here.> I kept on trying to migrate my pool with children (see previous threads) and had the (bad) idea to try the -d option on the receive part. The system reboots immediately. Here is the log in /var/adm/messages Feb 8 16:07:09 amber unix: [ID 836849 kern.notice] Feb 8 16:07:09 amber ^Mpanic[cpu1]/thread=ffffff014ba86e40: Feb 8